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path: root/drivers/net/tg3.h
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Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h26
1 files changed, 19 insertions, 7 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 453a34fb72b9..cd30889650f8 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -49,6 +49,12 @@
#define TG3PCI_DEVICE_TIGON3_5717 0x1655
#define TG3PCI_DEVICE_TIGON3_5718 0x1656
#define TG3PCI_DEVICE_TIGON3_5724 0x165c
+#define TG3PCI_DEVICE_TIGON3_57781 0x16b1
+#define TG3PCI_DEVICE_TIGON3_57785 0x16b5
+#define TG3PCI_DEVICE_TIGON3_57761 0x16b0
+#define TG3PCI_DEVICE_TIGON3_57765 0x16b4
+#define TG3PCI_DEVICE_TIGON3_57791 0x16b2
+#define TG3PCI_DEVICE_TIGON3_57795 0x16b6
/* 0x04 --> 0x64 unused */
#define TG3PCI_MSI_DATA 0x00000064
/* 0x66 --> 0x68 unused */
@@ -122,6 +128,7 @@
#define ASIC_REV_5785 0x5785
#define ASIC_REV_57780 0x57780
#define ASIC_REV_5717 0x5717
+#define ASIC_REV_57765 0x57785
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71
@@ -220,6 +227,7 @@
/* 0xc0 --> 0xf4 unused */
#define TG3PCI_GEN2_PRODID_ASICREV 0x000000f4
+#define TG3PCI_GEN15_PRODID_ASICREV 0x000000fc
/* 0xf8 --> 0x200 unused */
#define TG3_CORR_ERR_STAT 0x00000110
@@ -1813,6 +1821,11 @@
#define TG3_OTP_DEFAULT 0x286c1640
+
+/* Hardware Legacy NVRAM layout */
+#define TG3_NVM_VPD_OFF 0x100
+#define TG3_NVM_VPD_LEN 256
+
/* Hardware Selfboot NVRAM layout */
#define TG3_NVM_HWSB_CFG1 0x00000004
#define TG3_NVM_HWSB_CFG1_MAJMSK 0xf8000000
@@ -2441,10 +2454,6 @@ struct ring_info {
DECLARE_PCI_UNMAP_ADDR(mapping)
};
-struct tx_ring_info {
- struct sk_buff *skb;
-};
-
struct tg3_config_info {
u32 flags;
};
@@ -2608,7 +2617,7 @@ struct tg3_napi {
struct tg3_rx_buffer_desc *rx_rcb;
struct tg3_tx_buffer_desc *tx_ring;
- struct tx_ring_info *tx_buffers;
+ struct ring_info *tx_buffers;
dma_addr_t status_mapping;
dma_addr_t rx_rcb_mapping;
@@ -2795,9 +2804,11 @@ struct tg3 {
#define TG3_FLG3_NO_NVRAM 0x00004000
#define TG3_FLG3_PHY_IS_FET 0x00010000
#define TG3_FLG3_ENABLE_RSS 0x00020000
+#define TG3_FLG3_ENABLE_TSS 0x00040000
#define TG3_FLG3_4G_DMA_BNDRY_BUG 0x00080000
#define TG3_FLG3_40BIT_DMA_LIMIT_BUG 0x00100000
#define TG3_FLG3_SHORT_DMA_BUG 0x00200000
+#define TG3_FLG3_USE_JUMBO_BDFLAG 0x00400000
struct timer_list timer;
u16 timer_counter;
@@ -2887,8 +2898,9 @@ struct tg3 {
u32 led_ctrl;
u32 phy_otp;
- char board_part_number[24];
-#define TG3_VER_SIZE 32
+#define TG3_BPN_SIZE 24
+ char board_part_number[TG3_BPN_SIZE];
+#define TG3_VER_SIZE ETHTOOL_FWVERS_LEN
char fw_ver[TG3_VER_SIZE];
u32 nic_sram_data_cfg;
u32 pci_clock_ctrl;