diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/subdev')
33 files changed, 119 insertions, 60 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c index e4866a02e457..c962df9910dd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c @@ -141,14 +141,24 @@ nvkm_acr_bootstrap_falcons(struct nvkm_device *device, unsigned long mask) struct nvkm_acr *acr = device->acr; unsigned long id; + /* If there's no LS FW managing bootstrapping of other LS falcons, + * we depend on the HS firmware being able to do it instead. + */ if (!acrflcn) { - int ret = nvkm_acr_reload(acr); - if (ret) - return ret; + /* Which isn't possible everywhere... */ + if ((mask & acr->func->bootstrap_falcons) == mask) { + int ret = nvkm_acr_reload(acr); + if (ret) + return ret; - return acr->done ? 0 : -EINVAL; + return acr->done ? 0 : -EINVAL; + } + return -ENOSYS; } + if ((mask & acrflcn->func->bootstrap_falcons) != mask) + return -ENOSYS; + if (acrflcn->func->bootstrap_multiple_falcons) { return acrflcn->func-> bootstrap_multiple_falcons(acrflcn->falcon, mask); @@ -167,13 +177,10 @@ bool nvkm_acr_managed_falcon(struct nvkm_device *device, enum nvkm_acr_lsf_id id) { struct nvkm_acr *acr = device->acr; - struct nvkm_acr_lsf *lsf; if (acr) { - list_for_each_entry(lsf, &acr->lsf, head) { - if (lsf->id == id) - return true; - } + if (acr->managed_falcons & BIT_ULL(id)) + return true; } return false; @@ -213,6 +220,7 @@ nvkm_acr_oneinit(struct nvkm_subdev *subdev) struct nvkm_acr_lsfw *lsfw, *lsft; struct nvkm_acr_lsf *lsf; u32 wpr_size = 0; + u64 falcons; int ret, i; if (list_empty(&acr->hsfw)) { @@ -248,12 +256,28 @@ nvkm_acr_oneinit(struct nvkm_subdev *subdev) lsf->falcon = lsfw->falcon; lsf->id = lsfw->id; list_add_tail(&lsf->head, &acr->lsf); + acr->managed_falcons |= BIT_ULL(lsf->id); } /* Ensure the falcon that'll provide ACR functions is booted first. */ lsf = nvkm_acr_falcon(device); - if (lsf) + if (lsf) { + falcons = lsf->func->bootstrap_falcons; list_move(&lsf->head, &acr->lsf); + } else { + falcons = acr->func->bootstrap_falcons; + } + + /* Cull falcons that can't be bootstrapped, or the HSFW can fail to + * boot and leave the GPU in a weird state. + */ + list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { + if (!(falcons & BIT_ULL(lsfw->id))) { + nvkm_warn(subdev, "%s falcon cannot be bootstrapped\n", + nvkm_acr_lsf_id(lsfw->id)); + nvkm_acr_lsfw_del(lsfw); + } + } if (!acr->wpr_fw || acr->wpr_comp) wpr_size = acr->func->wpr_layout(acr); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c index 9a6394085cf0..cd41b2e6cc87 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c @@ -32,6 +32,17 @@ #include <nvfw/acr.h> #include <nvfw/flcn.h> +const struct nvkm_acr_func +gm200_acr = { +}; + +int +gm200_acr_nofw(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif) +{ + nvkm_warn(&acr->subdev, "firmware unavailable\n"); + return 0; +} + int gm200_acr_init(struct nvkm_acr *acr) { @@ -425,7 +436,7 @@ gm200_acr_load_fwif[] = { }; static const struct nvkm_acr_func -gm200_acr = { +gm200_acr_0 = { .load = gm200_acr_load_fwif, .unload = gm200_acr_unload_fwif, .wpr_parse = gm200_acr_wpr_parse, @@ -435,6 +446,8 @@ gm200_acr = { .wpr_patch = gm200_acr_wpr_patch, .wpr_check = gm200_acr_wpr_check, .init = gm200_acr_init, + .bootstrap_falcons = BIT_ULL(NVKM_ACR_LSF_FECS) | + BIT_ULL(NVKM_ACR_LSF_GPCCS), }; static int @@ -459,7 +472,8 @@ gm200_acr_load(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif) static const struct nvkm_acr_fwif gm200_acr_fwif[] = { - { 0, gm200_acr_load, &gm200_acr }, + { 0, gm200_acr_load, &gm200_acr_0 }, + { -1, gm200_acr_nofw, &gm200_acr }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c index 034a6ede70c7..b1ecc58152cc 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c @@ -123,7 +123,8 @@ gm20b_acr_load(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif) static const struct nvkm_acr_fwif gm20b_acr_fwif[] = { - { 0, gm20b_acr_load, &gm20b_acr }, + { 0, gm20b_acr_load, &gm20b_acr }, + { -1, gm200_acr_nofw, &gm200_acr }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c index 49e11c46d525..80eb9d8dbc80 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c @@ -270,7 +270,8 @@ gp102_acr_load(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif) static const struct nvkm_acr_fwif gp102_acr_fwif[] = { - { 0, gp102_acr_load, &gp102_acr }, + { 0, gp102_acr_load, &gp102_acr }, + { -1, gm200_acr_nofw, &gm200_acr }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.c index f10dc9112678..67a7c141004b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.c @@ -100,7 +100,8 @@ gp108_acr = { static const struct nvkm_acr_fwif gp108_acr_fwif[] = { - { 0, gp102_acr_load, &gp108_acr }, + { 0, gp102_acr_load, &gp108_acr }, + { -1, gm200_acr_nofw, &gm200_acr }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.c index 39de64292a41..8249f0d2d81d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.c @@ -46,7 +46,8 @@ gp10b_acr = { static const struct nvkm_acr_fwif gp10b_acr_fwif[] = { - { 0, gm20b_acr_load, &gp10b_acr }, + { 0, gm20b_acr_load, &gp10b_acr }, + { -1, gm200_acr_nofw, &gm200_acr }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c index 07d1830126ab..9b1cf6711ae9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c @@ -60,7 +60,7 @@ nvkm_acr_lsfw_add(const struct nvkm_acr_lsf_func *func, struct nvkm_acr *acr, { struct nvkm_acr_lsfw *lsfw; - if (!acr) + if (!acr || list_empty(&acr->hsfw)) return ERR_PTR(-ENOSYS); lsfw = nvkm_acr_lsfw_get(acr, id); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h index d8ba72806d39..d71af17a169a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h @@ -10,6 +10,7 @@ struct nvkm_acr_fwif { const struct nvkm_acr_func *func; }; +int gm200_acr_nofw(struct nvkm_acr *, int, const struct nvkm_acr_fwif *); int gm20b_acr_load(struct nvkm_acr *, int, const struct nvkm_acr_fwif *); int gp102_acr_load(struct nvkm_acr *, int, const struct nvkm_acr_fwif *); @@ -27,8 +28,10 @@ struct nvkm_acr_func { void (*wpr_check)(struct nvkm_acr *, u64 *start, u64 *limit); int (*init)(struct nvkm_acr *); void (*fini)(struct nvkm_acr *); + u64 bootstrap_falcons; }; +extern const struct nvkm_acr_func gm200_acr; int gm200_acr_wpr_parse(struct nvkm_acr *); u32 gm200_acr_wpr_layout(struct nvkm_acr *); int gm200_acr_wpr_build(struct nvkm_acr *, struct nvkm_acr_lsf *); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c index d28d8f36ae24..c4981bce9a2b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c @@ -219,6 +219,7 @@ tu102_acr_load(struct nvkm_acr *acr, int version, static const struct nvkm_acr_fwif tu102_acr_fwif[] = { { 0, tu102_acr_load, &tu102_acr }, + { -1, gm200_acr_nofw, &gm200_acr }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.c index a8d5d67feeaf..8698f260b988 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.c @@ -172,8 +172,8 @@ dcb_outp_parse(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, outp->dpconf.link_nr = 1; break; } + fallthrough; - /* fall-through... */ case DCB_OUTPUT_TMDS: case DCB_OUTPUT_LVDS: outp->link = (conf & 0x00000030) >> 4; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c index b099d1209be8..c694501ae206 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c @@ -100,7 +100,7 @@ nvbios_dpout_parse(struct nvkm_bios *bios, u8 idx, switch (*ver) { case 0x20: info->mask |= 0x00c0; /* match any link */ - /* fall-through */ + fallthrough; case 0x21: case 0x30: info->flags = nvbios_rd08(bios, data + 0x05); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c index 7112992e0e38..f039388f0676 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c @@ -135,7 +135,7 @@ nvbios_perfEp(struct nvkm_bios *bios, int idx, break; case 0x30: info->script = nvbios_rd16(bios, perf + 0x02); - /* fall through */ + fallthrough; case 0x35: info->fanspeed = nvbios_rd08(bios, perf + 0x06); info->voltage = nvbios_rd08(bios, perf + 0x07); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c index bda6cc9a7aaf..350f10a3de37 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c @@ -134,7 +134,7 @@ pll_map(struct nvkm_bios *bios) device->chipset == 0xaa || device->chipset == 0xac) return g84_pll_mapping; - /* fall through */ + fallthrough; default: return NULL; } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c index 20ff5173cf8f..2da45e29f68b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c @@ -115,21 +115,21 @@ nvbios_timingEp(struct nvkm_bios *bios, int idx, switch (min_t(u8, *hdr, 25)) { case 25: p->timing_10_24 = nvbios_rd08(bios, data + 0x18); - /* fall through */ + fallthrough; case 24: case 23: case 22: p->timing_10_21 = nvbios_rd08(bios, data + 0x15); - /* fall through */ + fallthrough; case 21: p->timing_10_20 = nvbios_rd08(bios, data + 0x14); - /* fall through */ + fallthrough; case 20: p->timing_10_CWL = nvbios_rd08(bios, data + 0x13); - /* fall through */ + fallthrough; case 19: p->timing_10_18 = nvbios_rd08(bios, data + 0x12); - /* fall through */ + fallthrough; case 18: case 17: p->timing_10_16 = nvbios_rd08(bios, data + 0x10); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c index 40e564524b7a..dc184e857f85 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c @@ -90,7 +90,7 @@ nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate, case NVKM_CLK_BOOST_NONE: if (clk->base_khz && freq > clk->base_khz) return false; - /* fall through */ + fallthrough; case NVKM_CLK_BOOST_BIOS: if (clk->boost_khz && freq > clk->boost_khz) return false; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c index 4f000237796f..efa50274df97 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c @@ -363,7 +363,7 @@ mcp77_clk_prog(struct nvkm_clk *base) switch (clk->vsrc) { case nv_clk_src_cclk: mast |= 0x00400000; - /* fall through */ + fallthrough; default: nvkm_wr32(device, 0x4600, clk->vdiv); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c index c3dae05348eb..317ce9fb8225 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c @@ -119,11 +119,11 @@ powerctrl_1_shift(int chip_version, int reg) switch (reg) { case 0x680520: - shift += 4; /* fall through */ + shift += 4; fallthrough; case 0x680508: - shift += 4; /* fall through */ + shift += 4; fallthrough; case 0x680504: - shift += 4; /* fall through */ + shift += 4; fallthrough; case 0x680500: shift += 4; } @@ -245,11 +245,11 @@ setPLL_double_highregs(struct nvkm_devinit *init, u32 reg1, switch (reg1) { case 0x680504: - shift_c040 += 2; /* fall through */ + shift_c040 += 2; fallthrough; case 0x680500: - shift_c040 += 2; /* fall through */ + shift_c040 += 2; fallthrough; case 0x680520: - shift_c040 += 2; /* fall through */ + shift_c040 += 2; fallthrough; case 0x680508: shift_c040 += 2; } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c index 5f4c287d7943..97b3a28ca5c0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c @@ -131,13 +131,13 @@ nv40_ram_prog(struct nvkm_ram *base) nvkm_mask(device, 0x00402c, 0xc0771100, ram->ctrl); nvkm_wr32(device, 0x004048, ram->coef); nvkm_wr32(device, 0x004030, ram->coef); - /* fall through */ + fallthrough; case 0x43: case 0x49: case 0x4b: nvkm_mask(device, 0x004038, 0xc0771100, ram->ctrl); nvkm_wr32(device, 0x00403c, ram->coef); - /* fall through */ + fallthrough; default: nvkm_mask(device, 0x004020, 0xc0771100, ram->ctrl); nvkm_wr32(device, 0x004024, ram->coef); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c index ff8629de97d6..45c62f5ef782 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c @@ -23,7 +23,7 @@ #include "priv.h" -void +static void gp10b_mc_init(struct nvkm_mc *mc) { struct nvkm_device *device = mc->subdev.device; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c index ee11ccaf0563..de91e9a26172 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c @@ -61,7 +61,7 @@ nvkm_mmu_ptp_put(struct nvkm_mmu *mmu, bool force, struct nvkm_mmu_pt *pt) kfree(pt); } -struct nvkm_mmu_pt * +static struct nvkm_mmu_pt * nvkm_mmu_ptp_get(struct nvkm_mmu *mmu, u32 size, bool zero) { struct nvkm_mmu_pt *pt; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.c index b21e82eb0916..94081f35f967 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.c @@ -27,7 +27,7 @@ #include <nvif/class.h> -const u8 * +static const u8 * tu102_mmu_kind(struct nvkm_mmu *mmu, int *count, u8 *invalid) { static const u8 diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c index 19a6804e3989..710f3f8dc7c9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c @@ -1030,7 +1030,7 @@ nvkm_vmm_ctor_managed(struct nvkm_vmm *vmm, u64 addr, u64 size) return 0; } -int +static int nvkm_vmm_ctor(const struct nvkm_vmm_func *func, struct nvkm_mmu *mmu, u32 pd_header, bool managed, u64 addr, u64 size, struct lock_class_key *key, const char *name, diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h index d3f8f916d0db..a2b179568970 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h @@ -163,9 +163,6 @@ int nvkm_vmm_new_(const struct nvkm_vmm_func *, struct nvkm_mmu *, u32 pd_header, bool managed, u64 addr, u64 size, struct lock_class_key *, const char *name, struct nvkm_vmm **); -int nvkm_vmm_ctor(const struct nvkm_vmm_func *, struct nvkm_mmu *, - u32 pd_header, bool managed, u64 addr, u64 size, - struct lock_class_key *, const char *name, struct nvkm_vmm *); struct nvkm_vma *nvkm_vmm_node_search(struct nvkm_vmm *, u64 addr); struct nvkm_vma *nvkm_vmm_node_split(struct nvkm_vmm *, struct nvkm_vma *, u64 addr, u64 size); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c index 7eabe9fe0d2b..236db5570771 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c @@ -553,7 +553,6 @@ void gp100_vmm_flush(struct nvkm_vmm *vmm, int depth) { u32 type = (5 /* CACHE_LEVEL_UP_TO_PDE3 */ - depth) << 24; - type = 0; /*XXX: need to confirm stuff works with depth enabled... */ if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR])) type |= 0x00000004; /* HUB_ONLY */ type |= 0x00000001; /* PAGE_ALL */ diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c index be91cffc3b52..b1294d0076c0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c @@ -28,9 +28,9 @@ tu102_vmm_flush(struct nvkm_vmm *vmm, int depth) { struct nvkm_subdev *subdev = &vmm->mmu->subdev; struct nvkm_device *device = subdev->device; - u32 type = depth << 24; /*XXX: not confirmed */ + u32 type = (5 /* CACHE_LEVEL_UP_TO_PDE3 */ - depth) << 24; - type = 0x00000001; /* PAGE_ALL */ + type |= 0x00000001; /* PAGE_ALL */ if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR])) type |= 0x00000004; /* HUB_ONLY */ diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c index 2a6150ab5611..70e2c414bb7b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c @@ -159,7 +159,7 @@ mxm_dcb_sanitise_entry(struct nvkm_bios *bios, void *data, int idx, u16 pdcb) break; case 0x0e: /* eDP, falls through to DPint */ ctx.outp[1] |= 0x00010000; - /* fall through */ + fallthrough; case 0x07: /* DP internal, wtf is this?? HP8670w */ ctx.outp[1] |= 0x00000004; /* use_power_scripts? */ type = DCB_CONNECTOR_eDP; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/Kbuild index a76c2a7bd696..eafc9321a08a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/Kbuild @@ -9,7 +9,7 @@ nvkm-y += nvkm/subdev/pmu/gk110.o nvkm-y += nvkm/subdev/pmu/gk208.o nvkm-y += nvkm/subdev/pmu/gk20a.o nvkm-y += nvkm/subdev/pmu/gm107.o +nvkm-y += nvkm/subdev/pmu/gm200.o nvkm-y += nvkm/subdev/pmu/gm20b.o -nvkm-y += nvkm/subdev/pmu/gp100.o nvkm-y += nvkm/subdev/pmu/gp102.o nvkm-y += nvkm/subdev/pmu/gp10b.o diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.c index 09e05db21ff5..383376addb41 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.c @@ -24,20 +24,28 @@ #include "priv.h" static const struct nvkm_pmu_func -gp100_pmu = { +gm200_pmu = { .flcn = >215_pmu_flcn, .enabled = gf100_pmu_enabled, .reset = gf100_pmu_reset, }; + +int +gm200_pmu_nofw(struct nvkm_pmu *pmu, int ver, const struct nvkm_pmu_fwif *fwif) +{ + nvkm_warn(&pmu->subdev, "firmware unavailable\n"); + return 0; +} + static const struct nvkm_pmu_fwif -gp100_pmu_fwif[] = { - { -1, gf100_pmu_nofw, &gp100_pmu }, +gm200_pmu_fwif[] = { + { -1, gm200_pmu_nofw, &gm200_pmu }, {} }; int -gp100_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu) +gm200_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu) { - return nvkm_pmu_new_(gp100_pmu_fwif, device, index, ppmu); + return nvkm_pmu_new_(gm200_pmu_fwif, device, index, ppmu); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c index 82571032a07d..8f6ed5373ea1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c @@ -28,7 +28,7 @@ #include <nvfw/pmu.h> static int -gm20b_pmu_acr_bootstrap_falcon_cb(void *priv, struct nv_falcon_msg *hdr) +gm20b_pmu_acr_bootstrap_falcon_cb(void *priv, struct nvfw_falcon_msg *hdr) { struct nv_pmu_acr_bootstrap_falcon_msg *msg = container_of(hdr, typeof(*msg), msg.hdr); @@ -126,11 +126,14 @@ gm20b_pmu_acr = { .bld_write = gm20b_pmu_acr_bld_write, .bld_patch = gm20b_pmu_acr_bld_patch, .boot = gm20b_pmu_acr_boot, + .bootstrap_falcons = BIT_ULL(NVKM_ACR_LSF_PMU) | + BIT_ULL(NVKM_ACR_LSF_FECS) | + BIT_ULL(NVKM_ACR_LSF_GPCCS), .bootstrap_falcon = gm20b_pmu_acr_bootstrap_falcon, }; static int -gm20b_pmu_acr_init_wpr_callback(void *priv, struct nv_falcon_msg *hdr) +gm20b_pmu_acr_init_wpr_callback(void *priv, struct nvfw_falcon_msg *hdr) { struct nv_pmu_acr_init_wpr_region_msg *msg = container_of(hdr, typeof(*msg), msg.hdr); @@ -231,7 +234,8 @@ gm20b_pmu_load(struct nvkm_pmu *pmu, int ver, const struct nvkm_pmu_fwif *fwif) static const struct nvkm_pmu_fwif gm20b_pmu_fwif[] = { - { 0, gm20b_pmu_load, &gm20b_pmu, &gm20b_pmu_acr }, + { 0, gm20b_pmu_load, &gm20b_pmu, &gm20b_pmu_acr }, + { -1, gm200_pmu_nofw, &gm20b_pmu }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c index 262b8a3dd507..3d8ce14dba7b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c @@ -46,7 +46,7 @@ gp102_pmu = { static const struct nvkm_pmu_fwif gp102_pmu_fwif[] = { - { -1, gf100_pmu_nofw, &gp102_pmu }, + { -1, gm200_pmu_nofw, &gp102_pmu }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c index 5b81c7320479..9c237c426599 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c @@ -28,7 +28,7 @@ static int gp10b_pmu_acr_bootstrap_multiple_falcons_cb(void *priv, - struct nv_falcon_msg *hdr) + struct nvfw_falcon_msg *hdr) { struct nv_pmu_acr_bootstrap_multiple_falcons_msg *msg = container_of(hdr, typeof(*msg), msg.hdr); @@ -69,6 +69,9 @@ gp10b_pmu_acr = { .bld_write = gm20b_pmu_acr_bld_write, .bld_patch = gm20b_pmu_acr_bld_patch, .boot = gm20b_pmu_acr_boot, + .bootstrap_falcons = BIT_ULL(NVKM_ACR_LSF_PMU) | + BIT_ULL(NVKM_ACR_LSF_FECS) | + BIT_ULL(NVKM_ACR_LSF_GPCCS), .bootstrap_falcon = gm20b_pmu_acr_bootstrap_falcon, .bootstrap_multiple_falcons = gp10b_pmu_acr_bootstrap_multiple_falcons, }; @@ -90,7 +93,8 @@ MODULE_FIRMWARE("nvidia/gp10b/pmu/sig.bin"); static const struct nvkm_pmu_fwif gp10b_pmu_fwif[] = { - { 0, gm20b_pmu_load, &gp10b_pmu, &gp10b_pmu_acr }, + { 0, gm20b_pmu_load, &gp10b_pmu, &gp10b_pmu_acr }, + { -1, gm200_pmu_nofw, &gp10b_pmu }, {} }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h index f470859244de..276b6d778e53 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h @@ -59,6 +59,7 @@ struct nvkm_pmu_fwif { }; int gf100_pmu_nofw(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *); +int gm200_pmu_nofw(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *); int gm20b_pmu_load(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *); int nvkm_pmu_ctor(const struct nvkm_pmu_fwif *, struct nvkm_device *, diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c index 4caf401d001a..c08097f2aff5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c @@ -36,7 +36,7 @@ gt215_therm_fan_sense(struct nvkm_therm *therm) return -ENODEV; } -void +static void gt215_therm_init(struct nvkm_therm *therm) { struct nvkm_device *device = therm->subdev.device; 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