diff options
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a3xx.xml.h')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a3xx.xml.h | 248 |
1 files changed, 142 insertions, 106 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a3xx.xml.h b/drivers/gpu/drm/msm/adreno/a3xx.xml.h index 109e9a263daf..e91a739452d7 100644 --- a/drivers/gpu/drm/msm/adreno/a3xx.xml.h +++ b/drivers/gpu/drm/msm/adreno/a3xx.xml.h @@ -12,9 +12,9 @@ The rules-ng-ng source files this header was generated from are: - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2013-03-31 16:51:27) - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30) - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15053 bytes, from 2014-11-09 15:45:47) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 63169 bytes, from 2014-11-13 22:44:18) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 49097 bytes, from 2014-11-14 15:38:00) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64344 bytes, from 2014-12-12 20:22:26) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51069 bytes, from 2014-12-21 15:51:54) Copyright (C) 2013-2014 by the following authors: - Rob Clark <robdclark@gmail.com> (robclark) @@ -58,111 +58,130 @@ enum a3xx_cache_opcode { }; enum a3xx_vtx_fmt { - VFMT_FLOAT_32 = 0, - VFMT_FLOAT_32_32 = 1, - VFMT_FLOAT_32_32_32 = 2, - VFMT_FLOAT_32_32_32_32 = 3, - VFMT_FLOAT_16 = 4, - VFMT_FLOAT_16_16 = 5, - VFMT_FLOAT_16_16_16 = 6, - VFMT_FLOAT_16_16_16_16 = 7, - VFMT_FIXED_32 = 8, - VFMT_FIXED_32_32 = 9, - VFMT_FIXED_32_32_32 = 10, - VFMT_FIXED_32_32_32_32 = 11, - VFMT_SHORT_16 = 16, - VFMT_SHORT_16_16 = 17, - VFMT_SHORT_16_16_16 = 18, - VFMT_SHORT_16_16_16_16 = 19, - VFMT_USHORT_16 = 20, - VFMT_USHORT_16_16 = 21, - VFMT_USHORT_16_16_16 = 22, - VFMT_USHORT_16_16_16_16 = 23, - VFMT_NORM_SHORT_16 = 24, - VFMT_NORM_SHORT_16_16 = 25, - VFMT_NORM_SHORT_16_16_16 = 26, - VFMT_NORM_SHORT_16_16_16_16 = 27, - VFMT_NORM_USHORT_16 = 28, - VFMT_NORM_USHORT_16_16 = 29, - VFMT_NORM_USHORT_16_16_16 = 30, - VFMT_NORM_USHORT_16_16_16_16 = 31, - VFMT_UINT_32 = 32, - VFMT_UINT_32_32 = 33, - VFMT_UINT_32_32_32 = 34, - VFMT_UINT_32_32_32_32 = 35, - VFMT_INT_32 = 36, - VFMT_INT_32_32 = 37, - VFMT_INT_32_32_32 = 38, - VFMT_INT_32_32_32_32 = 39, - VFMT_UBYTE_8 = 40, - VFMT_UBYTE_8_8 = 41, - VFMT_UBYTE_8_8_8 = 42, - VFMT_UBYTE_8_8_8_8 = 43, - VFMT_NORM_UBYTE_8 = 44, - VFMT_NORM_UBYTE_8_8 = 45, - VFMT_NORM_UBYTE_8_8_8 = 46, - VFMT_NORM_UBYTE_8_8_8_8 = 47, - VFMT_BYTE_8 = 48, - VFMT_BYTE_8_8 = 49, - VFMT_BYTE_8_8_8 = 50, - VFMT_BYTE_8_8_8_8 = 51, - VFMT_NORM_BYTE_8 = 52, - VFMT_NORM_BYTE_8_8 = 53, - VFMT_NORM_BYTE_8_8_8 = 54, - VFMT_NORM_BYTE_8_8_8_8 = 55, - VFMT_UINT_10_10_10_2 = 60, - VFMT_NORM_UINT_10_10_10_2 = 61, - VFMT_INT_10_10_10_2 = 62, - VFMT_NORM_INT_10_10_10_2 = 63, + VFMT_32_FLOAT = 0, + VFMT_32_32_FLOAT = 1, + VFMT_32_32_32_FLOAT = 2, + VFMT_32_32_32_32_FLOAT = 3, + VFMT_16_FLOAT = 4, + VFMT_16_16_FLOAT = 5, + VFMT_16_16_16_FLOAT = 6, + VFMT_16_16_16_16_FLOAT = 7, + VFMT_32_FIXED = 8, + VFMT_32_32_FIXED = 9, + VFMT_32_32_32_FIXED = 10, + VFMT_32_32_32_32_FIXED = 11, + VFMT_16_SINT = 16, + VFMT_16_16_SINT = 17, + VFMT_16_16_16_SINT = 18, + VFMT_16_16_16_16_SINT = 19, + VFMT_16_UINT = 20, + VFMT_16_16_UINT = 21, + VFMT_16_16_16_UINT = 22, + VFMT_16_16_16_16_UINT = 23, + VFMT_16_SNORM = 24, + VFMT_16_16_SNORM = 25, + VFMT_16_16_16_SNORM = 26, + VFMT_16_16_16_16_SNORM = 27, + VFMT_16_UNORM = 28, + VFMT_16_16_UNORM = 29, + VFMT_16_16_16_UNORM = 30, + VFMT_16_16_16_16_UNORM = 31, + VFMT_32_UINT = 32, + VFMT_32_32_UINT = 33, + VFMT_32_32_32_UINT = 34, + VFMT_32_32_32_32_UINT = 35, + VFMT_32_SINT = 36, + VFMT_32_32_SINT = 37, + VFMT_32_32_32_SINT = 38, + VFMT_32_32_32_32_SINT = 39, + VFMT_8_UINT = 40, + VFMT_8_8_UINT = 41, + VFMT_8_8_8_UINT = 42, + VFMT_8_8_8_8_UINT = 43, + VFMT_8_UNORM = 44, + VFMT_8_8_UNORM = 45, + VFMT_8_8_8_UNORM = 46, + VFMT_8_8_8_8_UNORM = 47, + VFMT_8_SINT = 48, + VFMT_8_8_SINT = 49, + VFMT_8_8_8_SINT = 50, + VFMT_8_8_8_8_SINT = 51, + VFMT_8_SNORM = 52, + VFMT_8_8_SNORM = 53, + VFMT_8_8_8_SNORM = 54, + VFMT_8_8_8_8_SNORM = 55, + VFMT_10_10_10_2_UINT = 60, + VFMT_10_10_10_2_UNORM = 61, + VFMT_10_10_10_2_SINT = 62, + VFMT_10_10_10_2_SNORM = 63, }; enum a3xx_tex_fmt { - TFMT_NORM_USHORT_565 = 4, - TFMT_NORM_USHORT_5551 = 6, - TFMT_NORM_USHORT_4444 = 7, - TFMT_NORM_USHORT_Z16 = 9, - TFMT_NORM_UINT_X8Z24 = 10, - TFMT_FLOAT_Z32 = 11, - TFMT_NORM_UINT_NV12_UV_TILED = 17, - TFMT_NORM_UINT_NV12_Y_TILED = 19, - TFMT_NORM_UINT_NV12_UV = 21, - TFMT_NORM_UINT_NV12_Y = 23, - TFMT_NORM_UINT_I420_Y = 24, - TFMT_NORM_UINT_I420_U = 26, - TFMT_NORM_UINT_I420_V = 27, - TFMT_NORM_UINT_2_10_10_10 = 41, - TFMT_FLOAT_9_9_9_E5 = 42, - TFMT_FLOAT_10_11_11 = 43, - TFMT_NORM_UINT_A8 = 44, - TFMT_NORM_UINT_L8_A8 = 47, - TFMT_NORM_UINT_8 = 48, - TFMT_NORM_UINT_8_8 = 49, - TFMT_NORM_UINT_8_8_8 = 50, - TFMT_NORM_UINT_8_8_8_8 = 51, - TFMT_NORM_SINT_8_8 = 53, - TFMT_NORM_SINT_8_8_8_8 = 55, - TFMT_UINT_8_8 = 57, - TFMT_UINT_8_8_8_8 = 59, - TFMT_SINT_8_8 = 61, - TFMT_SINT_8_8_8_8 = 63, - TFMT_FLOAT_16 = 64, - TFMT_FLOAT_16_16 = 65, - TFMT_FLOAT_16_16_16_16 = 67, - TFMT_UINT_16 = 68, - TFMT_UINT_16_16 = 69, - TFMT_UINT_16_16_16_16 = 71, - TFMT_SINT_16 = 72, - TFMT_SINT_16_16 = 73, - TFMT_SINT_16_16_16_16 = 75, - TFMT_FLOAT_32 = 84, - TFMT_FLOAT_32_32 = 85, - TFMT_FLOAT_32_32_32_32 = 87, - TFMT_UINT_32 = 88, - TFMT_UINT_32_32 = 89, - TFMT_UINT_32_32_32_32 = 91, - TFMT_SINT_32 = 92, - TFMT_SINT_32_32 = 93, - TFMT_SINT_32_32_32_32 = 95, + TFMT_5_6_5_UNORM = 4, + TFMT_5_5_5_1_UNORM = 5, + TFMT_4_4_4_4_UNORM = 7, + TFMT_Z16_UNORM = 9, + TFMT_X8Z24_UNORM = 10, + TFMT_Z32_FLOAT = 11, + TFMT_NV12_UV_TILED = 17, + TFMT_NV12_Y_TILED = 19, + TFMT_NV12_UV = 21, + TFMT_NV12_Y = 23, + TFMT_I420_Y = 24, + TFMT_I420_U = 26, + TFMT_I420_V = 27, + TFMT_DXT1 = 36, + TFMT_DXT3 = 37, + TFMT_DXT5 = 38, + TFMT_10_10_10_2_UNORM = 41, + TFMT_9_9_9_E5_FLOAT = 42, + TFMT_11_11_10_FLOAT = 43, + TFMT_A8_UNORM = 44, + TFMT_L8_A8_UNORM = 47, + TFMT_8_UNORM = 48, + TFMT_8_8_UNORM = 49, + TFMT_8_8_8_UNORM = 50, + TFMT_8_8_8_8_UNORM = 51, + TFMT_8_SNORM = 52, + TFMT_8_8_SNORM = 53, + TFMT_8_8_8_SNORM = 54, + TFMT_8_8_8_8_SNORM = 55, + TFMT_8_UINT = 56, + TFMT_8_8_UINT = 57, + TFMT_8_8_8_UINT = 58, + TFMT_8_8_8_8_UINT = 59, + TFMT_8_SINT = 60, + TFMT_8_8_SINT = 61, + TFMT_8_8_8_SINT = 62, + TFMT_8_8_8_8_SINT = 63, + TFMT_16_FLOAT = 64, + TFMT_16_16_FLOAT = 65, + TFMT_16_16_16_16_FLOAT = 67, + TFMT_16_UINT = 68, + TFMT_16_16_UINT = 69, + TFMT_16_16_16_16_UINT = 71, + TFMT_16_SINT = 72, + TFMT_16_16_SINT = 73, + TFMT_16_16_16_16_SINT = 75, + TFMT_16_UNORM = 76, + TFMT_16_16_UNORM = 77, + TFMT_16_16_16_16_UNORM = 79, + TFMT_16_SNORM = 80, + TFMT_16_16_SNORM = 81, + TFMT_16_16_16_16_SNORM = 83, + TFMT_32_FLOAT = 84, + TFMT_32_32_FLOAT = 85, + TFMT_32_32_32_32_FLOAT = 87, + TFMT_32_UINT = 88, + TFMT_32_32_UINT = 89, + TFMT_32_32_32_32_UINT = 91, + TFMT_32_SINT = 92, + TFMT_32_32_SINT = 93, + TFMT_32_32_32_32_SINT = 95, + TFMT_RGTC2_SNORM = 112, + TFMT_RGTC2_UNORM = 113, + TFMT_RGTC1_SNORM = 114, + TFMT_RGTC1_UNORM = 115, }; enum a3xx_tex_fetchsize { @@ -180,9 +199,11 @@ enum a3xx_color_fmt { RB_R4G4B4A4_UNORM = 3, RB_R8G8B8_UNORM = 4, RB_R8G8B8A8_UNORM = 8, + RB_R8G8B8A8_SNORM = 9, RB_R8G8B8A8_UINT = 10, RB_R8G8B8A8_SINT = 11, RB_R8G8_UNORM = 12, + RB_R8G8_SNORM = 13, RB_R8_UINT = 14, RB_R8_SINT = 15, RB_R10G10B10A2_UNORM = 16, @@ -258,6 +279,14 @@ enum a3xx_tex_clamp { A3XX_TEX_MIRROR_CLAMP = 4, }; +enum a3xx_tex_aniso { + A3XX_TEX_ANISO_1 = 0, + A3XX_TEX_ANISO_2 = 1, + A3XX_TEX_ANISO_4 = 2, + A3XX_TEX_ANISO_8 = 3, + A3XX_TEX_ANISO_16 = 4, +}; + enum a3xx_tex_swiz { A3XX_TEX_X = 0, A3XX_TEX_Y = 1, @@ -1563,12 +1592,13 @@ static inline uint32_t A3XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val) { return ((val) << A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK; } -#define A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK 0x0001ff80 +#define A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK 0x0000ff80 #define A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT 7 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val) { return ((val) << A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK; } +#define A3XX_VFD_FETCH_INSTR_0_INSTANCED 0x00010000 #define A3XX_VFD_FETCH_INSTR_0_SWITCHNEXT 0x00020000 #define A3XX_VFD_FETCH_INSTR_0_INDEXCODE__MASK 0x00fc0000 #define A3XX_VFD_FETCH_INSTR_0_INDEXCODE__SHIFT 18 @@ -2509,6 +2539,12 @@ static inline uint32_t A3XX_TEX_SAMP_0_WRAP_R(enum a3xx_tex_clamp val) { return ((val) << A3XX_TEX_SAMP_0_WRAP_R__SHIFT) & A3XX_TEX_SAMP_0_WRAP_R__MASK; } +#define A3XX_TEX_SAMP_0_ANISO__MASK 0x00038000 +#define A3XX_TEX_SAMP_0_ANISO__SHIFT 15 +static inline uint32_t A3XX_TEX_SAMP_0_ANISO(enum a3xx_tex_aniso val) +{ + return ((val) << A3XX_TEX_SAMP_0_ANISO__SHIFT) & A3XX_TEX_SAMP_0_ANISO__MASK; +} #define A3XX_TEX_SAMP_0_COMPARE_FUNC__MASK 0x00700000 #define A3XX_TEX_SAMP_0_COMPARE_FUNC__SHIFT 20 static inline uint32_t A3XX_TEX_SAMP_0_COMPARE_FUNC(enum adreno_compare_func val) |