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path: root/drivers/clk/ti/clkctrl.c
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Diffstat (limited to 'drivers/clk/ti/clkctrl.c')
-rw-r--r--drivers/clk/ti/clkctrl.c91
1 files changed, 84 insertions, 7 deletions
diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
index 53e71d0503ec..afa0d6bfc5c1 100644
--- a/drivers/clk/ti/clkctrl.c
+++ b/drivers/clk/ti/clkctrl.c
@@ -21,6 +21,7 @@
#include <linux/of_address.h>
#include <linux/clk/ti.h>
#include <linux/delay.h>
+#include <linux/timekeeping.h>
#include "clock.h"
#define NO_IDLEST 0x1
@@ -46,6 +47,7 @@ static bool _early_timeout = true;
struct omap_clkctrl_provider {
void __iomem *base;
struct list_head clocks;
+ char *clkdm_name;
};
struct omap_clkctrl_clk {
@@ -89,7 +91,18 @@ static bool _omap4_is_ready(u32 val)
static bool _omap4_is_timeout(union omap4_timeout *time, u32 timeout)
{
- if (unlikely(_early_timeout)) {
+ /*
+ * There are two special cases where ktime_to_ns() can't be
+ * used to track the timeouts. First one is during early boot
+ * when the timers haven't been initialized yet. The second
+ * one is during suspend-resume cycle while timekeeping is
+ * being suspended / resumed. Clocksource for the system
+ * can be from a timer that requires pm_runtime access, which
+ * will eventually bring us here with timekeeping_suspended,
+ * during both suspend entry and resume paths. This happens
+ * at least on am43xx platform.
+ */
+ if (unlikely(_early_timeout || timekeeping_suspended)) {
if (time->cycles++ < timeout) {
udelay(1);
return false;
@@ -208,6 +221,7 @@ static const struct clk_ops omap4_clkctrl_clk_ops = {
.enable = _omap4_clkctrl_clk_enable,
.disable = _omap4_clkctrl_clk_disable,
.is_enabled = _omap4_clkctrl_clk_is_enabled,
+ .init = omap2_init_clk_clkdm,
};
static struct clk_hw *_ti_omap4_clkctrl_xlate(struct of_phandle_args *clkspec,
@@ -321,6 +335,9 @@ _ti_clkctrl_setup_mux(struct omap_clkctrl_provider *provider,
}
mux->mask = num_parents;
+ if (!(mux->flags & CLK_MUX_INDEX_ONE))
+ mux->mask--;
+
mux->mask = (1 << fls(mux->mask)) - 1;
mux->shift = data->bit;
@@ -340,6 +357,7 @@ _ti_clkctrl_setup_div(struct omap_clkctrl_provider *provider,
{
struct clk_omap_divider *div;
const struct omap_clkctrl_div_data *div_data = data->data;
+ u8 div_flags = 0;
div = kzalloc(sizeof(*div), GFP_KERNEL);
if (!div)
@@ -347,12 +365,16 @@ _ti_clkctrl_setup_div(struct omap_clkctrl_provider *provider,
div->reg.ptr = reg;
div->shift = data->bit;
+ div->flags = div_data->flags;
+
+ if (div->flags & CLK_DIVIDER_POWER_OF_TWO)
+ div_flags |= CLKF_INDEX_POWER_OF_TWO;
- if (ti_clk_parse_divider_data((int *)div_data->dividers,
- div_data->max_div, 0, 0,
+ if (ti_clk_parse_divider_data((int *)div_data->dividers, 0,
+ div_data->max_div, div_flags,
&div->width, &div->table)) {
- pr_err("%s: Data parsing for %s:%04x:%d failed\n", __func__,
- node->name, offset, data->bit);
+ pr_err("%s: Data parsing for %pOF:%04x:%d failed\n", __func__,
+ node, offset, data->bit);
kfree(div);
return;
}
@@ -400,6 +422,12 @@ _ti_clkctrl_setup_subclks(struct omap_clkctrl_provider *provider,
}
}
+static void __init _clkctrl_add_provider(void *data,
+ struct device_node *np)
+{
+ of_clk_add_hw_provider(np, _ti_omap4_clkctrl_xlate, data);
+}
+
static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
{
struct omap_clkctrl_provider *provider;
@@ -411,6 +439,7 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
struct omap_clkctrl_clk *clkctrl_clk;
const __be32 *addrp;
u32 addr;
+ int ret;
addrp = of_get_address(node, 0, NULL, NULL);
addr = (u32)of_translate_address(node, addrp);
@@ -419,6 +448,31 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
if (of_machine_is_compatible("ti,omap4"))
data = omap4_clkctrl_data;
#endif
+#ifdef CONFIG_SOC_OMAP5
+ if (of_machine_is_compatible("ti,omap5"))
+ data = omap5_clkctrl_data;
+#endif
+#ifdef CONFIG_SOC_DRA7XX
+ if (of_machine_is_compatible("ti,dra7"))
+ data = dra7_clkctrl_data;
+#endif
+#ifdef CONFIG_SOC_AM33XX
+ if (of_machine_is_compatible("ti,am33xx"))
+ data = am3_clkctrl_data;
+#endif
+#ifdef CONFIG_SOC_AM43XX
+ if (of_machine_is_compatible("ti,am4372"))
+ data = am4_clkctrl_data;
+ if (of_machine_is_compatible("ti,am438x"))
+ data = am438x_clkctrl_data;
+#endif
+#ifdef CONFIG_SOC_TI81XX
+ if (of_machine_is_compatible("ti,dm814"))
+ data = dm814_clkctrl_data;
+
+ if (of_machine_is_compatible("ti,dm816"))
+ data = dm816_clkctrl_data;
+#endif
while (data->addr) {
if (addr == data->addr)
@@ -428,7 +482,7 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
}
if (!data->addr) {
- pr_err("%s not found from clkctrl data.\n", node->name);
+ pr_err("%pOF not found from clkctrl data.\n", node);
return;
}
@@ -438,6 +492,21 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
provider->base = of_iomap(node, 0);
+ provider->clkdm_name = kmalloc(strlen(node->parent->name) + 3,
+ GFP_KERNEL);
+ if (!provider->clkdm_name) {
+ kfree(provider);
+ return;
+ }
+
+ /*
+ * Create default clkdm name, replace _cm from end of parent node
+ * name with _clkdm
+ */
+ strcpy(provider->clkdm_name, node->parent->name);
+ provider->clkdm_name[strlen(provider->clkdm_name) - 2] = 0;
+ strcat(provider->clkdm_name, "clkdm");
+
INIT_LIST_HEAD(&provider->clocks);
/* Generate clocks */
@@ -460,6 +529,11 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
if (reg_data->flags & CLKF_NO_IDLEST)
hw->flags |= NO_IDLEST;
+ if (reg_data->clkdm_name)
+ hw->clkdm_name = reg_data->clkdm_name;
+ else
+ hw->clkdm_name = provider->clkdm_name;
+
init.parent_names = &reg_data->parent;
init.num_parents = 1;
init.flags = 0;
@@ -485,7 +559,10 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
reg_data++;
}
- of_clk_add_hw_provider(node, _ti_omap4_clkctrl_xlate, provider);
+ ret = of_clk_add_hw_provider(node, _ti_omap4_clkctrl_xlate, provider);
+ if (ret == -EPROBE_DEFER)
+ ti_clk_retry_init(node, provider, _clkctrl_add_provider);
+
return;
cleanup:
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-27 12:34:36 +0300