diff options
Diffstat (limited to 'arch/riscv/include/uapi')
| -rw-r--r-- | arch/riscv/include/uapi/asm/elf.h | 9 | ||||
| -rw-r--r-- | arch/riscv/include/uapi/asm/syscalls.h | 13 |
2 files changed, 15 insertions, 7 deletions
diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index 5cae4c30cd8e..1e0dfc36aab9 100644 --- a/arch/riscv/include/uapi/asm/elf.h +++ b/arch/riscv/include/uapi/asm/elf.h @@ -21,8 +21,13 @@ typedef struct user_regs_struct elf_gregset_t; typedef union __riscv_fp_state elf_fpregset_t; -#define ELF_RISCV_R_SYM(r_info) ((r_info) >> 32) -#define ELF_RISCV_R_TYPE(r_info) ((r_info) & 0xffffffff) +#if __riscv_xlen == 64 +#define ELF_RISCV_R_SYM(r_info) ELF64_R_SYM(r_info) +#define ELF_RISCV_R_TYPE(r_info) ELF64_R_TYPE(r_info) +#else +#define ELF_RISCV_R_SYM(r_info) ELF32_R_SYM(r_info) +#define ELF_RISCV_R_TYPE(r_info) ELF32_R_TYPE(r_info) +#endif /* * RISC-V relocation types diff --git a/arch/riscv/include/uapi/asm/syscalls.h b/arch/riscv/include/uapi/asm/syscalls.h index 818655b0d535..206dc4b0f6ea 100644 --- a/arch/riscv/include/uapi/asm/syscalls.h +++ b/arch/riscv/include/uapi/asm/syscalls.h @@ -1,10 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2017 SiFive + * Copyright (C) 2017-2018 SiFive */ -#ifndef _ASM__UAPI__SYSCALLS_H -#define _ASM__UAPI__SYSCALLS_H +/* + * There is explicitly no include guard here because this file is expected to + * be included multiple times in order to define the syscall macros via + * __SYSCALL. + */ /* * Allows the instruction cache to be flushed from userspace. Despite RISC-V @@ -20,7 +23,7 @@ * caller. We don't currently do anything with the address range, that's just * in there for forwards compatibility. */ +#ifndef __NR_riscv_flush_icache #define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15) -__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache) - #endif +__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache) |