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Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi90
1 files changed, 86 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 760bbc463c5b..6cc83d4c6c76 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -65,6 +65,48 @@
interrupt-parent = <&intc>;
ranges;
+ adc@f8007100 {
+ compatible = "xlnx,zynq-xadc-1.00.a";
+ reg = <0xf8007100 0x20>;
+ interrupts = <0 7 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 12>;
+ };
+
+ can0: can@e0008000 {
+ compatible = "xlnx,zynq-can-1.0";
+ status = "disabled";
+ clocks = <&clkc 19>, <&clkc 36>;
+ clock-names = "can_clk", "pclk";
+ reg = <0xe0008000 0x1000>;
+ interrupts = <0 28 4>;
+ interrupt-parent = <&intc>;
+ tx-fifo-depth = <0x40>;
+ rx-fifo-depth = <0x40>;
+ };
+
+ can1: can@e0009000 {
+ compatible = "xlnx,zynq-can-1.0";
+ status = "disabled";
+ clocks = <&clkc 20>, <&clkc 37>;
+ clock-names = "can_clk", "pclk";
+ reg = <0xe0009000 0x1000>;
+ interrupts = <0 51 4>;
+ interrupt-parent = <&intc>;
+ tx-fifo-depth = <0x40>;
+ rx-fifo-depth = <0x40>;
+ };
+
+ gpio0: gpio@e000a000 {
+ compatible = "xlnx,zynq-gpio-1.0";
+ #gpio-cells = <2>;
+ clocks = <&clkc 42>;
+ gpio-controller;
+ interrupt-parent = <&intc>;
+ interrupts = <0 20 4>;
+ reg = <0xe000a000 0x1000>;
+ };
+
i2c0: i2c@e0004000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
@@ -105,23 +147,47 @@
};
uart0: serial@e0000000 {
- compatible = "xlnx,xuartps";
+ compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled";
clocks = <&clkc 23>, <&clkc 40>;
- clock-names = "ref_clk", "aper_clk";
+ clock-names = "uart_clk", "pclk";
reg = <0xE0000000 0x1000>;
interrupts = <0 27 4>;
};
uart1: serial@e0001000 {
- compatible = "xlnx,xuartps";
+ compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled";
clocks = <&clkc 24>, <&clkc 41>;
- clock-names = "ref_clk", "aper_clk";
+ clock-names = "uart_clk", "pclk";
reg = <0xE0001000 0x1000>;
interrupts = <0 50 4>;
};
+ spi0: spi@e0006000 {
+ compatible = "xlnx,zynq-spi-r1p6";
+ reg = <0xe0006000 0x1000>;
+ status = "disabled";
+ interrupt-parent = <&intc>;
+ interrupts = <0 26 4>;
+ clocks = <&clkc 25>, <&clkc 34>;
+ clock-names = "ref_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi@e0007000 {
+ compatible = "xlnx,zynq-spi-r1p6";
+ reg = <0xe0007000 0x1000>;
+ status = "disabled";
+ interrupt-parent = <&intc>;
+ interrupts = <0 49 4>;
+ clocks = <&clkc 26>, <&clkc 35>;
+ clock-names = "ref_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
gem0: ethernet@e000b000 {
compatible = "cdns,gem";
reg = <0xe000b000 0x4000>;
@@ -186,6 +252,22 @@
};
};
+ dmac_s: dmac@f8003000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0xf8003000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 13 4>,
+ <0 14 4>, <0 15 4>,
+ <0 16 4>, <0 17 4>,
+ <0 40 4>, <0 41 4>,
+ <0 42 4>, <0 43 4>;
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ clocks = <&clkc 27>;
+ clock-names = "apb_pclk";
+ };
+
devcfg: devcfg@f8007000 {
compatible = "xlnx,zynq-devcfg-1.0";
reg = <0xf8007000 0x100>;