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authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-06 19:11:57 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-06 19:11:57 +0400
commit18a1a7a1d862ae0794a0179473d08a414dd49234 (patch)
tree013ffe8b7fbbe9169801d0be1a780ee9bf53c08e /tools/perf
parent04535d273ee3edacd9551b2512b4e939ba20277f (diff)
parent5eb0bdf84433eb7b7ad4ba92a80aac57ad4b46ea (diff)
downloadlinux-18a1a7a1d862ae0794a0179473d08a414dd49234.tar.xz
Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile
Pull arch/tile updates from Chris Metcalf: "These fix a few stray build issues seen in linux-next, and also add the minimal required support for perf to tilegx" * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: arch/tile: remove unused variable 'devcap' tile: Fix vDSO compilation issue with allyesconfig perf tools: Allow building for tile tile/perf: Support perf_events on tilegx and tilepro tile: Enable NMIs on return from handle_nmi() without errors tile: Add support for handling PMC hardware tile: don't use __get_cpu_var() with structure-typed arguments tile: avoid overflow in ns2cycles
Diffstat (limited to 'tools/perf')
-rw-r--r--tools/perf/config/Makefile.arch3
-rw-r--r--tools/perf/perf.h8
2 files changed, 10 insertions, 1 deletions
diff --git a/tools/perf/config/Makefile.arch b/tools/perf/config/Makefile.arch
index fef8ae922800..4b06719ee984 100644
--- a/tools/perf/config/Makefile.arch
+++ b/tools/perf/config/Makefile.arch
@@ -5,7 +5,8 @@ ARCH ?= $(shell echo $(uname_M) | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
-e s/arm.*/arm/ -e s/sa110/arm/ \
-e s/s390x/s390/ -e s/parisc64/parisc/ \
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
- -e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ )
+ -e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ \
+ -e s/tile.*/tile/ )
# Additional ARCH settings for x86
ifeq ($(ARCH),i386)
diff --git a/tools/perf/perf.h b/tools/perf/perf.h
index e18a8b5e6953..5c11ecad02a9 100644
--- a/tools/perf/perf.h
+++ b/tools/perf/perf.h
@@ -145,6 +145,14 @@
#define CPUINFO_PROC "core ID"
#endif
+#ifdef __tile__
+#define mb() asm volatile ("mf" ::: "memory")
+#define wmb() asm volatile ("mf" ::: "memory")
+#define rmb() asm volatile ("mf" ::: "memory")
+#define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory")
+#define CPUINFO_PROC "model name"
+#endif
+
#define barrier() asm volatile ("" ::: "memory")
#ifndef cpu_relax