diff options
| author | Andrew Bresticker <abrestic@chromium.org> | 2013-09-26 01:12:49 +0400 |
|---|---|---|
| committer | Tomasz Figa <t.figa@samsung.com> | 2014-01-08 21:02:42 +0400 |
| commit | 35399dda011b515120e0c39463ac32f0cac75c6a (patch) | |
| tree | d3117a0bf64baa1b1841570ed61af2cbd25f3cf0 /include/dt-bindings/clock | |
| parent | 547f33509ccc6e016df02600d377778b75e26a7b (diff) | |
| download | linux-35399dda011b515120e0c39463ac32f0cac75c6a.tar.xz | |
clk: exynos5250: add clock ID for div_pcm0
There is no gate for the PCM clock input to the AudioSS block, so
the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that
we can reference it in device trees.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/exynos5250.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h index 0512572b2b24..922f2dca9bf0 100644 --- a/include/dt-bindings/clock/exynos5250.h +++ b/include/dt-bindings/clock/exynos5250.h @@ -55,6 +55,7 @@ #define CLK_DIV_I2S1 157 #define CLK_DIV_I2S2 158 #define CLK_SCLK_HDMIPHY 159 +#define CLK_DIV_PCM0 160 /* gate clocks */ #define CLK_GSCL0 256 |