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authorRalf Baechle <ralf@linux-mips.org>2005-08-16 21:54:41 +0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 22:32:07 +0400
commit8b200ce4a697fbbf446de3a0874232d7aaa3f6d3 (patch)
treeff0ae21d04f4d590b8bdd51c0a7f8006f7d7cc20 /include/asm-mips
parentac351d947390c00b8ece3cde997fe173fc8649ed (diff)
downloadlinux-8b200ce4a697fbbf446de3a0874232d7aaa3f6d3.tar.xz
Define cpu_icache_snoops_remote_store. This is slight abuse of something
which originally was meant for SMP cache managment but it can be argued to apply on the 34K as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/mach-mips/cpu-feature-overrides.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index 7a1189fdf1aa..98927f8b5f6d 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -37,6 +37,7 @@
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
/* #define cpu_has_subset_pcaches ? */
+#define cpu_icache_snoops_remote_store 1
#endif
#ifdef CONFIG_CPU_MIPS64_R1
@@ -62,6 +63,7 @@
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
/* #define cpu_has_subset_pcaches ? */
+#define cpu_icache_snoops_remote_store 1
#endif
#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */