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authorPeter Chen <peter.chen@freescale.com>2015-02-11 07:44:51 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-03-18 18:19:09 +0300
commit2e37cfd8e0a0bb161a75ce2bc2302a1a1662fdb7 (patch)
treeaeb71ea89c3ceaa076969ecd410fca615c6ef29b /drivers/usb/chipidea
parent01e3ad863fc0f15b802c8a5247e1c252bd04f429 (diff)
downloadlinux-2e37cfd8e0a0bb161a75ce2bc2302a1a1662fdb7.tar.xz
usb: chipidea: clear otg interrupt status for otg capable controller
We need to do it for all otg capable controller, not only peripheral featured otg capable controller, otherwise, the host-only role, but otg capable controller may be responded by otg interrupt. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/chipidea')
-rw-r--r--drivers/usb/chipidea/core.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 6d9dc2d175eb..23373543a149 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -649,8 +649,12 @@ static void ci_get_otg_capable(struct ci_hdrc *ci)
ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
DCCPARAMS_DC | DCCPARAMS_HC)
== (DCCPARAMS_DC | DCCPARAMS_HC));
- if (ci->is_otg)
+ if (ci->is_otg) {
dev_dbg(ci->dev, "It is OTG capable controller\n");
+ /* Disable and clear all OTG irq */
+ hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
+ OTGSC_INT_STATUS_BITS);
+ }
}
static int ci_hdrc_probe(struct platform_device *pdev)
@@ -749,9 +753,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
}
if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
- /* Disable and clear all OTG irq */
- hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
- OTGSC_INT_STATUS_BITS);
ret = ci_hdrc_otg_init(ci);
if (ret) {
dev_err(dev, "init otg fails, ret = %d\n", ret);