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authorRong Wang <Rong.Wang@csr.com>2013-09-29 18:27:59 +0400
committerLinus Walleij <linus.walleij@linaro.org>2013-10-08 12:19:26 +0400
commit6a08a92ec45782e5543addf5f8785e2560a078f6 (patch)
treee5844fb3b5f3913e0a1f1c17790eebcf987a5540 /drivers/pinctrl/sirf/pinctrl-sirf.h
parentaf614b2301f0e30423240a754ec2812a4c793201 (diff)
downloadlinux-6a08a92ec45782e5543addf5f8785e2560a078f6.tar.xz
pinctrl: sirf: add USB1/UART1 pinmux usb/uart share
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1). here we add this pinmux capability. USB1/UART1 mode selection has dedicated control register in RSC module, here we attach the register offset of private data of related pin groups. Signed-off-by: Rong Wang <Rong.Wang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sirf/pinctrl-sirf.h')
-rw-r--r--drivers/pinctrl/sirf/pinctrl-sirf.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.h b/drivers/pinctrl/sirf/pinctrl-sirf.h
index 17cc108510ba..d7f16b499ad9 100644
--- a/drivers/pinctrl/sirf/pinctrl-sirf.h
+++ b/drivers/pinctrl/sirf/pinctrl-sirf.h
@@ -9,8 +9,9 @@
#ifndef __PINMUX_SIRF_H__
#define __PINMUX_SIRF_H__
-#define SIRFSOC_NUM_PADS 622
-#define SIRFSOC_RSC_PIN_MUX 0x4
+#define SIRFSOC_NUM_PADS 622
+#define SIRFSOC_RSC_USB_UART_SHARE 0
+#define SIRFSOC_RSC_PIN_MUX 0x4
#define SIRFSOC_GPIO_PAD_EN(g) ((g)*0x100 + 0x84)
#define SIRFSOC_GPIO_PAD_EN_CLR(g) ((g)*0x100 + 0x90)
@@ -61,6 +62,7 @@ struct sirfsoc_padmux {
unsigned long muxmask_counts;
const struct sirfsoc_muxmask *muxmask;
/* RSC_PIN_MUX set */
+ unsigned long ctrlreg;
unsigned long funcmask;
unsigned long funcval;
};