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author | Bjorn Helgaas <bhelgaas@google.com> | 2019-07-13 01:08:38 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-07-13 01:08:38 +0300 |
commit | 916f12e494d7ff7c786144ac62807bd37755efb3 (patch) | |
tree | 282bd0333c7f704823075fe39e4f2cd20cb369f7 /drivers/pci | |
parent | 6bfc0c07cdb775ff5648df4afbe3ac7ce1c766ab (diff) | |
parent | 181fa434d0514e40ebf6e9721f2b72700287b6e2 (diff) | |
download | linux-916f12e494d7ff7c786144ac62807bd37755efb3.tar.xz |
Merge branch 'remotes/lorenzo/pci/xilinx'
- Fix Xilinx NWL multi-MSI vector aliasing issue (Bharat Kumar Gogada)
* remotes/lorenzo/pci/xilinx:
PCI: xilinx-nwl: Fix Multi MSI data programming
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/controller/pcie-xilinx-nwl.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index 3b031f00a94a..45c0f344ccd1 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -482,15 +482,13 @@ static int nwl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, int i; mutex_lock(&msi->lock); - bit = bitmap_find_next_zero_area(msi->bitmap, INT_PCI_MSI_NR, 0, - nr_irqs, 0); - if (bit >= INT_PCI_MSI_NR) { + bit = bitmap_find_free_region(msi->bitmap, INT_PCI_MSI_NR, + get_count_order(nr_irqs)); + if (bit < 0) { mutex_unlock(&msi->lock); return -ENOSPC; } - bitmap_set(msi->bitmap, bit, nr_irqs); - for (i = 0; i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, bit + i, &nwl_irq_chip, domain->host_data, handle_simple_irq, @@ -508,7 +506,8 @@ static void nwl_irq_domain_free(struct irq_domain *domain, unsigned int virq, struct nwl_msi *msi = &pcie->msi; mutex_lock(&msi->lock); - bitmap_clear(msi->bitmap, data->hwirq, nr_irqs); + bitmap_release_region(msi->bitmap, data->hwirq, + get_count_order(nr_irqs)); mutex_unlock(&msi->lock); } |