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authorZhou Wang <wangzhou1@hisilicon.com>2015-10-30 03:57:06 +0300
committerBjorn Helgaas <bhelgaas@google.com>2015-11-02 23:49:18 +0300
commit0021d22b73d69f2121b89987a94d5ef5c4e14271 (patch)
treecba9eb09b0aab738c88aacbcae0883929b811cc2 /drivers/pci/host/pcie-designware.h
parent9cdce1cdc0c40e6c2e85ed9ca13c32adaa5fe0c5 (diff)
downloadlinux-0021d22b73d69f2121b89987a94d5ef5c4e14271.tar.xz
PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT
Use the new of_pci_get_host_bridge_resources() API in place of the PCI OF DT parser. [bhelgaas: changelog] Tested-by: James Morse <james.morse@arm.com> Tested-by: Gabriel Fernandez <gabriel.fernandez@st.com> Tested-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
Diffstat (limited to 'drivers/pci/host/pcie-designware.h')
-rw-r--r--drivers/pci/host/pcie-designware.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index f21dc287adf1..631f5a6f6547 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -32,17 +32,17 @@ struct pcie_port {
u64 cfg1_base;
void __iomem *va_cfg1_base;
u32 cfg1_size;
- u64 io_base;
- u64 io_base_tmp;
+ resource_size_t io_base;
+ resource_size_t io_base_tmp;
phys_addr_t io_bus_addr;
u32 io_size;
u64 mem_base;
phys_addr_t mem_bus_addr;
u32 mem_size;
- struct resource cfg;
- struct resource io;
- struct resource mem;
- struct resource busn;
+ struct resource *cfg;
+ struct resource *io;
+ struct resource *mem;
+ struct resource *busn;
int irq;
u32 lanes;
struct pcie_host_ops *ops;