diff options
| author | Helmut Schaa <helmut.schaa@googlemail.com> | 2010-09-08 22:57:10 +0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2010-09-15 00:03:44 +0400 |
| commit | 6646505de03b2ae85de09fd3b8d383ab816a19f9 (patch) | |
| tree | 7370d51832cfa98363082e3f8c7cd133e70f13e7 /drivers/net/wireless/rt2x00/rt61pci.c | |
| parent | 93149cf87bdd511db86d709a6db7ed09f1b8ba99 (diff) | |
| download | linux-6646505de03b2ae85de09fd3b8d383ab816a19f9.tar.xz | |
rt2x00: Enable missing interrupts in rt61pci
We're handling both, the CSR_BEACON_DONE and the CSR_TWAKEUP interrupts
in rt61pci. However, these interrupts are masked out by default. Fix
this.
Found via pure code inspection.
Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
| -rw-r--r-- | drivers/net/wireless/rt2x00/rt61pci.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c index 7a35f121e678..286a5eb11339 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.c +++ b/drivers/net/wireless/rt2x00/rt61pci.c @@ -1654,6 +1654,7 @@ static void rt61pci_toggle_irq(struct rt2x00_dev *rt2x00dev, rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®); rt2x00_set_field32(®, INT_MASK_CSR_TXDONE, mask); rt2x00_set_field32(®, INT_MASK_CSR_RXDONE, mask); + rt2x00_set_field32(®, INT_MASK_CSR_BEACON_DONE, mask); rt2x00_set_field32(®, INT_MASK_CSR_ENABLE_MITIGATION, mask); rt2x00_set_field32(®, INT_MASK_CSR_MITIGATION_PERIOD, 0xff); rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg); @@ -1667,6 +1668,7 @@ static void rt61pci_toggle_irq(struct rt2x00_dev *rt2x00dev, rt2x00_set_field32(®, MCU_INT_MASK_CSR_5, mask); rt2x00_set_field32(®, MCU_INT_MASK_CSR_6, mask); rt2x00_set_field32(®, MCU_INT_MASK_CSR_7, mask); + rt2x00_set_field32(®, MCU_INT_MASK_CSR_TWAKEUP, mask); rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg); } |