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authorBen Hutchings <bhutchings@solarflare.com>2011-02-22 20:26:10 +0300
committerBen Hutchings <bhutchings@solarflare.com>2011-03-04 20:58:42 +0300
commit65f0b417dee94f779ce9b77102b7d73c93723b39 (patch)
tree390279203a8c73a986d15be5cc30f9bb2e95c1e8 /drivers/net/sfc/efx.c
parent6d84b986b26bac1d4d678ff10c10a633bf53f834 (diff)
downloadlinux-65f0b417dee94f779ce9b77102b7d73c93723b39.tar.xz
sfc: Use write-combining to reduce TX latency
Based on work by Neil Turton <nturton@solarflare.com> and Kieran Mansley <kmansley@solarflare.com>. The BIU has now been verified to handle 3- and 4-dword writes within a single 128-bit register correctly. This means we can enable write- combining and only insert write barriers between writes to distinct registers. This has been observed to save about 0.5 us when pushing a TX descriptor to an empty TX queue. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Diffstat (limited to 'drivers/net/sfc/efx.c')
-rw-r--r--drivers/net/sfc/efx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index d563049859a8..b8bd936374f2 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -1104,8 +1104,8 @@ static int efx_init_io(struct efx_nic *efx)
rc = -EIO;
goto fail3;
}
- efx->membase = ioremap_nocache(efx->membase_phys,
- efx->type->mem_map_size);
+ efx->membase = ioremap_wc(efx->membase_phys,
+ efx->type->mem_map_size);
if (!efx->membase) {
netif_err(efx, probe, efx->net_dev,
"could not map memory BAR at %llx+%x\n",