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authorRob Herring <robh@kernel.org>2018-03-08 18:21:07 +0300
committerRob Herring <robh@kernel.org>2018-03-08 18:21:07 +0300
commitc679fa6e3aaa5c58fc514b5b88cfa82774b8d390 (patch)
tree0c10b339368bd1795152a66a4e245e6f654fb3ec /drivers/irqchip/irq-gic-v3.c
parentbdb7013df910681f84eff27b07791d4c160cb76f (diff)
parent4fd98e374fd377ae0458a9dc44aa779cf9631ddd (diff)
downloadlinux-c679fa6e3aaa5c58fc514b5b88cfa82774b8d390.tar.xz
Merge branch 'dtc-update' into dt/next
Diffstat (limited to 'drivers/irqchip/irq-gic-v3.c')
-rw-r--r--drivers/irqchip/irq-gic-v3.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index a57c0fbbd34a..d99cc07903ec 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -673,7 +673,7 @@ static void gic_send_sgi(u64 cluster_id, u16 tlist, unsigned int irq)
MPIDR_TO_SGI_RS(cluster_id) |
tlist << ICC_SGI1R_TARGET_LIST_SHIFT);
- pr_debug("CPU%d: ICC_SGI1R_EL1 %llx\n", smp_processor_id(), val);
+ pr_devel("CPU%d: ICC_SGI1R_EL1 %llx\n", smp_processor_id(), val);
gic_write_sgi1r(val);
}
@@ -688,7 +688,7 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
* Ensure that stores to Normal memory are visible to the
* other CPUs before issuing the IPI.
*/
- smp_wmb();
+ wmb();
for_each_cpu(cpu, mask) {
u64 cluster_id = MPIDR_TO_SGI_CLUSTER_ID(cpu_logical_map(cpu));