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| author | Ben Skeggs <bskeggs@redhat.com> | 2011-10-26 03:11:02 +0400 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2011-12-21 13:01:24 +0400 |
| commit | f3fbaf34e2b1459eab248c5f0180928e7861120b (patch) | |
| tree | bd5bc90f52df47630e67dfd90e707500a88f3634 /drivers/gpu/drm/nouveau/nouveau_pm.h | |
| parent | d4cca9e1fccb9f7804ddfbbc2aebff7be23faa1e (diff) | |
| download | linux-f3fbaf34e2b1459eab248c5f0180928e7861120b.tar.xz | |
drm/nv50/pm: rewrite clock management, and switch to the new pm hooks
This area is horrifically complicated on these chipsets, and it's likely we
will need at least a few more tweaks yet.
Oh yes, and it's completely disabled on IGPs for the moment. From traces,
things look potentially different there yet again. Sigh...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_pm.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_pm.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.h b/drivers/gpu/drm/nouveau/nouveau_pm.h index 41050feb5b90..06df411ca5fe 100644 --- a/drivers/gpu/drm/nouveau/nouveau_pm.h +++ b/drivers/gpu/drm/nouveau/nouveau_pm.h @@ -60,10 +60,9 @@ int nv40_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*); int nv40_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32); /* nv50_pm.c */ -int nv50_pm_clock_get(struct drm_device *, u32 id); -void *nv50_pm_clock_pre(struct drm_device *, struct nouveau_pm_level *, - u32 id, int khz); -void nv50_pm_clock_set(struct drm_device *, void *); +int nv50_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *); +void *nv50_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *); +int nv50_pm_clocks_set(struct drm_device *, void *); int nv50_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*); int nv50_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32); |