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| author | Michał Winiarski <michal.winiarski@intel.com> | 2018-03-19 12:53:36 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-03-19 15:23:01 +0300 |
| commit | eacd8391f977d3800cc41a026f9f81fce210a78c (patch) | |
| tree | 58ef5ed9636f4808452920aefcfbb325c1a8529f /drivers/gpu/drm/i915/intel_guc.h | |
| parent | ad260ab32a4d94fa974f58262f8000472d34fd5b (diff) | |
| download | linux-eacd8391f977d3800cc41a026f9f81fce210a78c.tar.xz | |
drm/i915/guc: Keep GuC interrupts enabled when using GuC
The GuC log contains a separate space used for crash dump.
We even get a separate notification for it. While we're not handling
crash differently yet, it makes sense to decouple the two right now to
simplify the following patches.
v2: Move guc_log_flush_irq_disable up to avoid movement in following
patches (Sagar).
v3: s/guc_log_flush_irq_*/guc_flush_log_msg_*, rebase after mass rename
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v2)
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180319095348.9716-1-michal.winiarski@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_guc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index cdb649a9a4cf..9a95d1518aa9 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -56,7 +56,9 @@ struct intel_guc { struct drm_i915_gem_object *load_err_log; /* intel_guc_recv interrupt related state */ + spinlock_t irq_lock; bool interrupts_enabled; + unsigned int msg_enabled_mask; struct i915_vma *ads_vma; struct i915_vma *stage_desc_pool; |