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authorChristoph Manszewski <c.manszewski@samsung.com>2018-11-28 18:32:12 +0300
committerInki Dae <inki.dae@samsung.com>2018-12-05 11:35:21 +0300
commit13e810f199b48383523707aa69fb9673d688055a (patch)
treebd89011db6faa6e102536dd447390acadca678ab /drivers/gpu/drm/exynos/exynos_mixer.c
parente9e5ba93cb1f61c16298aade49ec2537d497f0d6 (diff)
downloadlinux-13e810f199b48383523707aa69fb9673d688055a.tar.xz
drm/exynos: mixer: Fix color range setting
Color format and color range was set based on resolution. Change that, by splitting range and format. Leave color format setting as it is, set color range based on drm_display_mode using drm_default_quant_range helper function. Tested on Odroid-U3 with Exynos 4412 CPU, kernel next-20181128 using modetest. Signed-off-by: Christoph Manszewski <c.manszewski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_mixer.c')
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 9cdae10fd36d..0573eab0e190 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -380,14 +380,16 @@ static void mixer_cfg_scan(struct mixer_context *ctx, int width, int height)
mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_SCAN_MASK);
}
-static void mixer_cfg_rgb_fmt(struct mixer_context *ctx, unsigned int height)
+static void mixer_cfg_rgb_fmt(struct mixer_context *ctx, struct drm_display_mode *mode)
{
+ enum hdmi_quantization_range range = drm_default_rgb_quant_range(mode);
u32 val;
- if (height < 720) {
- val = MXR_CFG_RGB601_0_255;
+ if (mode->vdisplay < 720) {
+ val = MXR_CFG_RGB601;
} else {
- val = MXR_CFG_RGB709_16_235;
+ val = MXR_CFG_RGB709;
+
/* Configure the BT.709 CSC matrix for full range RGB. */
mixer_reg_write(ctx, MXR_CM_COEFF_Y,
MXR_CSC_CT( 0.184, 0.614, 0.063) |
@@ -398,6 +400,11 @@ static void mixer_cfg_rgb_fmt(struct mixer_context *ctx, unsigned int height)
MXR_CSC_CT( 0.440, -0.399, -0.040));
}
+ if (range == HDMI_QUANTIZATION_RANGE_FULL)
+ val |= MXR_CFG_QUANT_RANGE_FULL;
+ else
+ val |= MXR_CFG_QUANT_RANGE_LIMITED;
+
mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_RGB_FMT_MASK);
}
@@ -454,7 +461,7 @@ static void mixer_commit(struct mixer_context *ctx)
struct drm_display_mode *mode = &ctx->crtc->base.state->adjusted_mode;
mixer_cfg_scan(ctx, mode->hdisplay, mode->vdisplay);
- mixer_cfg_rgb_fmt(ctx, mode->vdisplay);
+ mixer_cfg_rgb_fmt(ctx, mode);
mixer_run(ctx);
}