summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
diff options
context:
space:
mode:
authorBoris Brezillon <boris.brezillon@free-electrons.com>2017-02-06 20:57:19 +0300
committerBoris Brezillon <boris.brezillon@free-electrons.com>2017-02-28 13:57:56 +0300
commit9a45d33cdf82f138cc290236cde83483c6567394 (patch)
tree2b42c76e129812506c0087debd510baa8d409606 /drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
parent6140cf20341975400fb2ee7a72fa6316c1bc74f0 (diff)
downloadlinux-9a45d33cdf82f138cc290236cde83483c6567394.tar.xz
drm/atmel-hlcdc: Simplify the HLCDC layer logic
An HLCDC layers in Atmel's nomenclature is either a DRM plane or a 'Post Processing Layer' which can be used to output the results of the HLCDC composition in a memory buffer. atmel_hlcdc_layer.c was designed to be generic enough to be re-usable in both cases, but we're not exposing the post-processing layer yet, and even if we were, I'm not sure the code would provide the necessary tools to manipulate this kind of layer. Moreover, the code in atmel_hlcdc_{plane,layer}.c was designed before the atomic modesetting API, and was trying solve the check-setting/commit-if-ok/rollback-otherwise problem, which is now entirely solved by the existing core infrastructure. And finally, the code in atmel_hlcdc_layer.c is over-complicated compared to what we really need. This rework is a good excuse to simplify it. Note that this rework solves an existing resource leak (leading to a -EBUSY error) which I failed to clearly identify. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Eric Anholt <eric@anholt.net> Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Diffstat (limited to 'drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c')
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c39
1 files changed, 30 insertions, 9 deletions
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index fabeeea0e899..6b50fb706c0e 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -466,8 +466,8 @@ static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
int atmel_hlcdc_crtc_create(struct drm_device *dev)
{
+ struct atmel_hlcdc_plane *primary = NULL, *cursor = NULL;
struct atmel_hlcdc_dc *dc = dev->dev_private;
- struct atmel_hlcdc_planes *planes = dc->planes;
struct atmel_hlcdc_crtc *crtc;
int ret;
int i;
@@ -478,20 +478,41 @@ int atmel_hlcdc_crtc_create(struct drm_device *dev)
crtc->dc = dc;
- ret = drm_crtc_init_with_planes(dev, &crtc->base,
- &planes->primary->base,
- planes->cursor ? &planes->cursor->base : NULL,
- &atmel_hlcdc_crtc_funcs, NULL);
+ for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
+ if (!dc->layers[i])
+ continue;
+
+ switch (dc->layers[i]->desc->type) {
+ case ATMEL_HLCDC_BASE_LAYER:
+ primary = atmel_hlcdc_layer_to_plane(dc->layers[i]);
+ break;
+
+ case ATMEL_HLCDC_CURSOR_LAYER:
+ cursor = atmel_hlcdc_layer_to_plane(dc->layers[i]);
+ break;
+
+ default:
+ break;
+ }
+ }
+
+ ret = drm_crtc_init_with_planes(dev, &crtc->base, &primary->base,
+ &cursor->base, &atmel_hlcdc_crtc_funcs,
+ NULL);
if (ret < 0)
goto fail;
crtc->id = drm_crtc_index(&crtc->base);
- if (planes->cursor)
- planes->cursor->base.possible_crtcs = 1 << crtc->id;
+ for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
+ struct atmel_hlcdc_plane *overlay;
- for (i = 0; i < planes->noverlays; i++)
- planes->overlays[i]->base.possible_crtcs = 1 << crtc->id;
+ if (dc->layers[i] &&
+ dc->layers[i]->desc->type == ATMEL_HLCDC_OVERLAY_LAYER) {
+ overlay = atmel_hlcdc_layer_to_plane(dc->layers[i]);
+ overlay->base.possible_crtcs = 1 << crtc->id;
+ }
+ }
drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
drm_crtc_vblank_reset(&crtc->base);