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authorEvan Quan <evan.quan@amd.com>2020-09-01 06:02:31 +0300
committerAlex Deucher <alexander.deucher@amd.com>2020-09-18 00:46:13 +0300
commit10144762e2c37093fed8e2fcac7fbe2bcbb87e54 (patch)
treeb3a990be78515f7092590adeb89afc79d4883654 /drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
parent4bdd4d25ed0d31e50e77ca2b37d4b97c0d5a9a2f (diff)
downloadlinux-10144762e2c37093fed8e2fcac7fbe2bcbb87e54.tar.xz
drm/amd/pm: postpone SOCCLK/UCLK enablement after DAL initialization(V2)
This is needed for Navi1X only. And it may help for display missing or hang issue seen on some high resolution monitors. V2: no UCLK DPM enablement for Navi10 A0 secure SKU Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h')
-rw-r--r--drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index 6d00ad740c27..ab577be23c15 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -52,6 +52,10 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint32_t *feature_mask,
uint32_t num);
+int smu_cmn_feature_update_enable_state(struct smu_context *smu,
+ uint64_t feature_mask,
+ bool enabled);
+
int smu_cmn_feature_set_enabled(struct smu_context *smu,
enum smu_feature_mask mask,
bool enable);