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authorChris Wilson <chris@chris-wilson.co.uk>2017-06-16 13:54:55 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2017-06-16 16:52:27 +0300
commit7fc92e96c3eed6004ce8dab5e315264bff85db5a (patch)
tree4440f4b244e2699e387f2abdb1e37c295a50f279 /drivers/dma/s3c24xx-dma.c
parente27ab73d17ef90db3e586a02ce2f03eb660451cd (diff)
downloadlinux-7fc92e96c3eed6004ce8dab5e315264bff85db5a.tar.xz
drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty
For ease of use (i.e. avoiding a few checks and function calls), store the object's cache coherency next to the cache is dirty bit. Specifically this patch aims to reduce the frequency of no-op calls to i915_gem_object_clflush() to counter-act the increase of such calls for GPU only objects in the previous patch. v2: Replace cache_dirty & ~cache_coherent with cache_dirty && !cache_coherent as gcc generates much better code for the latter (Tvrtko) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Dongwon Kim <dongwon.kim@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Tested-by: Dongwon Kim <dongwon.kim@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170616105455.16977-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'drivers/dma/s3c24xx-dma.c')
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