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authorSowjanya Komatineni <skomatineni@nvidia.com>2019-08-16 22:41:56 +0300
committerThierry Reding <treding@nvidia.com>2019-11-11 16:53:03 +0300
commita99d744d8c9ca7e00adeb14dd11971b4b5b8271f (patch)
tree33bbb14e42e9160f53f5b3b763755575eef25ba4 /drivers/clk/tegra/clk-dfll.h
parentf8fd97521d6381b4a19b1b88692a426a79fe1794 (diff)
downloadlinux-a99d744d8c9ca7e00adeb14dd11971b4b5b8271f.tar.xz
clk: tegra: clk-dfll: Add suspend and resume support
This patch implements DFLL suspend and resume operation. During system suspend entry, CPU clock will switch CPU to safe clock source of PLLP and disables DFLL clock output. DFLL driver suspend confirms DFLL disable state and errors out on being active. DFLL is re-initialized during the DFLL driver resume as it goes through complete reset during suspend entry. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-dfll.h')
-rw-r--r--drivers/clk/tegra/clk-dfll.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-dfll.h b/drivers/clk/tegra/clk-dfll.h
index 1b14ebe7268b..fb209eb5f365 100644
--- a/drivers/clk/tegra/clk-dfll.h
+++ b/drivers/clk/tegra/clk-dfll.h
@@ -42,5 +42,7 @@ int tegra_dfll_register(struct platform_device *pdev,
struct tegra_dfll_soc_data *tegra_dfll_unregister(struct platform_device *pdev);
int tegra_dfll_runtime_suspend(struct device *dev);
int tegra_dfll_runtime_resume(struct device *dev);
+int tegra_dfll_suspend(struct device *dev);
+int tegra_dfll_resume(struct device *dev);
#endif /* __DRIVERS_CLK_TEGRA_CLK_DFLL_H */