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| author | davidwang <davidwang@zhaoxin.com> | 2018-01-22 13:14:17 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-01-24 15:38:10 +0300 |
| commit | fe6daab1ee9dfe7f89974ee6c486cccb0f18a61d (patch) | |
| tree | 7a8ad4a75e7aa384ae1011ed6abd7d6bd8d502b0 /arch/x86/kernel/cpu/centaur.c | |
| parent | aa83c45762a242acce9b35020363225a7b59d7c9 (diff) | |
| download | linux-fe6daab1ee9dfe7f89974ee6c486cccb0f18a61d.tar.xz | |
x86/centaur: Mark TSC invariant
Centaur CPU has a constant frequency TSC and that TSC does not stop in
C-States. But because the corresponding TSC feature flags are not set for
that CPU, the TSC is treated as not constant frequency and assumed to stop
in C-States, which makes it an unreliable and unusable clock source.
Setting those flags tells the kernel that the TSC is usable, so it will
select it over HPET. The effect of this is that reading time stamps (from
kernel or user space) will be faster and more efficent.
Signed-off-by: davidwang <davidwang@zhaoxin.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: qiyuanwang@zhaoxin.com
Cc: linux-pm@vger.kernel.org
Cc: brucechang@via-alliance.com
Cc: cooperyan@zhaoxin.com
Cc: benjaminpan@viatech.com
Link: https://lkml.kernel.org/r/1516616057-5158-1-git-send-email-davidwang@zhaoxin.com
Diffstat (limited to 'arch/x86/kernel/cpu/centaur.c')
| -rw-r--r-- | arch/x86/kernel/cpu/centaur.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c index 68bc6d9b3132..c578cd29c2d2 100644 --- a/arch/x86/kernel/cpu/centaur.c +++ b/arch/x86/kernel/cpu/centaur.c @@ -106,6 +106,10 @@ static void early_init_centaur(struct cpuinfo_x86 *c) #ifdef CONFIG_X86_64 set_cpu_cap(c, X86_FEATURE_SYSENTER32); #endif + if (c->x86_power & (1 << 8)) { + set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); + set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); + } } static void init_centaur(struct cpuinfo_x86 *c) |