diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2009-09-24 12:38:18 +0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-09-24 12:38:18 +0400 |
| commit | 23c4c82171008c8b18d8627c9741cdd577631cea (patch) | |
| tree | 8c9d2950fe69cbd6c1aa96ad6c698bbeb5c92325 /arch/sh | |
| parent | acf3cc283f1ea4ed7e579663eefed62f0aa572da (diff) | |
| download | linux-23c4c82171008c8b18d8627c9741cdd577631cea.tar.xz | |
sh: Handle unaligned 16-bit instructions on SH-2A.
This adds some sanity checking in the unaligned instruction handler to
verify the instruction size, which enables basic support for 16-bit
fixups on SH-2A parts.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/kernel/traps_32.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c index 6aba9af79eaf..f9760c5c234a 100644 --- a/arch/sh/kernel/traps_32.c +++ b/arch/sh/kernel/traps_32.c @@ -452,6 +452,12 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, u_int rm; int ret, index; + /* + * XXX: We can't handle mixed 16/32-bit instructions yet + */ + if (instruction_size(instruction) != 2) + return -EINVAL; + index = (instruction>>8)&15; /* 0x0F00 */ rm = regs->regs[index]; @@ -619,9 +625,9 @@ asmlinkage void do_address_error(struct pt_regs *regs, se_user += 1; -#ifndef CONFIG_CPU_SH2A set_fs(USER_DS); - if (copy_from_user(&instruction, (u16 *)(regs->pc & ~1), 2)) { + if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1), + sizeof(instruction))) { set_fs(oldfs); goto uspace_segv; } @@ -633,7 +639,6 @@ asmlinkage void do_address_error(struct pt_regs *regs, "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", current->comm, current->pid, (void *)regs->pc, instruction); -#endif if (se_usermode & 2) goto fixup; |