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authorMichael Neuling <mikey@neuling.org>2013-05-26 22:09:39 +0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-06-01 02:29:22 +0400
commit6ce6c629fd8254b3177650de99699682ff7f6707 (patch)
tree08a371c158cbf22868e71d36c0430640d9daf8cc /arch/powerpc/include/asm/reg.h
parent24b92375dc4ec8a15262e8aaaab60b7404d4b1e7 (diff)
downloadlinux-6ce6c629fd8254b3177650de99699682ff7f6707.tar.xz
powerpc/tm: Abort on emulation and alignment faults
If we are emulating an instruction inside an active user transaction that touches memory, the kernel can't emulate it as it operates in transactional suspend context. We need to abort these transactions and send them back to userspace for the hardware to rollback. We can service these if the user transaction is in suspend mode, since the kernel will operate in the same suspend context. This adds a check to all alignment faults and to specific instruction emulations (only string instructions for now). If the user process is in an active (non-suspended) transaction, we abort the transaction go back to userspace allowing the HW to roll back the transaction and tell the user of the failure. This also adds new tm abort cause codes to report the reason of the persistent error to the user. Crappy test case here http://neuling.org/devel/junkcode/aligntm.c Signed-off-by: Michael Neuling <mikey@neuling.org> Cc: <stable@vger.kernel.org> # v3.9 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
-rw-r--r--arch/powerpc/include/asm/reg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 8f6a94b2dc99..d0528e0d6db8 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -122,6 +122,8 @@
#define TM_CAUSE_SYSCALL 0xd8 /* future use */
#define TM_CAUSE_MISC 0xd6 /* future use */
#define TM_CAUSE_SIGNAL 0xd4
+#define TM_CAUSE_ALIGNMENT 0xd2
+#define TM_CAUSE_EMULATE 0xd0
#if defined(CONFIG_PPC_BOOK3S_64)
#define MSR_64BIT MSR_SF