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author | Arnd Bergmann <arnd@arndb.de> | 2013-05-07 01:38:00 +0400 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2013-05-07 01:38:00 +0400 |
commit | 4183bef2e093a2f0aab45f2d5fed82b0e02aeacf (patch) | |
tree | e84c484db3746a0f3ead0fb7a2bb9e5a42b89e85 /arch/mips/kernel/Makefile | |
parent | 662478d060a39b8faf2b1fe2fbbb212556c2e052 (diff) | |
parent | 775c4f66fd855e68a98fc5049003810fe98e2e20 (diff) | |
download | linux-4183bef2e093a2f0aab45f2d5fed82b0e02aeacf.tar.xz |
Merge branch 'late/dt' into next/dt2
This is support for the ARM Chromebook, originally scheduled
as a "late" pull request. Since it's already late now, we
can combine this into the existing next/dt2 branch.
* late/dt:
ARM: exynos: dts: cros5250: add EC device
ARM: dts: Add sbs-battery for exynos5250-snow
ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
ARM: dts: Add chip-id controller node on Exynos4/5 SoC
ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
Diffstat (limited to 'arch/mips/kernel/Makefile')
-rw-r--r-- | arch/mips/kernel/Makefile | 25 |
1 files changed, 6 insertions, 19 deletions
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index f81d98f6184c..de75fb50562b 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -100,29 +100,16 @@ obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_mipsxx.o obj-$(CONFIG_JUMP_LABEL) += jump_label.o # -# DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is safe -# to enable DSP assembler support here even if the MIPS Release 2 CPU we -# are targetting does not support DSP because all code-paths making use of -# it properly check that the running CPU *actually does* support these -# instructions. +# DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is not +# safe to unconditionnaly use the assembler -mdsp / -mdspr2 switches +# here because the compiler may use DSP ASE instructions (such as lwx) in +# code paths where we cannot check that the CPU we are running on supports it. +# Proper abstraction using HAVE_AS_DSP and macros is done in +# arch/mips/include/asm/mipsregs.h. # ifeq ($(CONFIG_CPU_MIPSR2), y) CFLAGS_DSP = -DHAVE_AS_DSP -# -# Check if assembler supports DSP ASE -# -ifeq ($(call cc-option-yn,-mdsp), y) -CFLAGS_DSP += -mdsp -endif - -# -# Check if assembler supports DSP ASE Rev2 -# -ifeq ($(call cc-option-yn,-mdspr2), y) -CFLAGS_DSP += -mdspr2 -endif - CFLAGS_signal.o = $(CFLAGS_DSP) CFLAGS_signal32.o = $(CFLAGS_DSP) CFLAGS_process.o = $(CFLAGS_DSP) |