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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-08-24 19:32:45 +0300 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-07 23:23:48 +0300 |
| commit | 44def3426e4ac5a2dbdb5c8304397f4daa38eb2f (patch) | |
| tree | 365e80bb0639308afa9500270f69b83fdd6f0d3b /arch/mips/include/asm/mach-sibyte | |
| parent | 5e5b6527128cea50f12a7064bf61b130b3a2739a (diff) | |
| download | linux-44def3426e4ac5a2dbdb5c8304397f4daa38eb2f.tar.xz | |
MIPS: Convert R4600_V2_HIT_CACHEOP into a config option
Use a new config option to enable R4600 V2 cacheop hit workaround
and remove define from different war.h files.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/mach-sibyte')
| -rw-r--r-- | arch/mips/include/asm/mach-sibyte/war.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h index bf793d36c890..78fd2ad4930b 100644 --- a/arch/mips/include/asm/mach-sibyte/war.h +++ b/arch/mips/include/asm/mach-sibyte/war.h @@ -8,8 +8,6 @@ #ifndef __ASM_MIPS_MACH_SIBYTE_WAR_H #define __ASM_MIPS_MACH_SIBYTE_WAR_H -#define R4600_V2_HIT_CACHEOP_WAR 0 - #if defined(CONFIG_SB1_PASS_2_WORKAROUNDS) #ifndef __ASSEMBLY__ |