diff options
author | David Daney <ddaney@caviumnetworks.com> | 2010-07-23 21:57:49 +0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 16:26:11 +0400 |
commit | edfcbb8cac13d679c0d656fd4576b3945429f3c0 (patch) | |
tree | 7963fd5752f5ee7d5e454c87118061eebcc068d3 /arch/mips/cavium-octeon/smp.c | |
parent | 7d9eee6e52e817c006666b0efc5068aa219dbecb (diff) | |
download | linux-edfcbb8cac13d679c0d656fd4576b3945429f3c0.tar.xz |
MIPS: Octeon: Clean up SMP CPU numbering.
Also number offline CPUs that could potentially be brought on-line
later.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1489/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/smp.c')
-rw-r--r-- | arch/mips/cavium-octeon/smp.c | 37 |
1 files changed, 30 insertions, 7 deletions
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 6d99b9d8887d..8ff2c7b41def 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2004-2008 Cavium Networks + * Copyright (C) 2004-2008, 2009, 2010 Cavium Networks */ #include <linux/cpu.h> #include <linux/init.h> @@ -102,24 +102,47 @@ static void octeon_smp_setup(void) const int coreid = cvmx_get_core_num(); int cpus; int id; - int core_mask = octeon_get_boot_coremask(); +#ifdef CONFIG_HOTPLUG_CPU + unsigned int num_cores = cvmx_octeon_num_cores(); +#endif + + /* The present CPUs are initially just the boot cpu (CPU 0). */ + for (id = 0; id < NR_CPUS; id++) { + set_cpu_possible(id, id == 0); + set_cpu_present(id, id == 0); + } - cpus_clear(cpu_possible_map); __cpu_number_map[coreid] = 0; __cpu_logical_map[0] = coreid; - cpu_set(0, cpu_possible_map); + /* The present CPUs get the lowest CPU numbers. */ cpus = 1; - for (id = 0; id < 16; id++) { + for (id = 0; id < NR_CPUS; id++) { if ((id != coreid) && (core_mask & (1 << id))) { - cpu_set(cpus, cpu_possible_map); + set_cpu_possible(cpus, true); + set_cpu_present(cpus, true); __cpu_number_map[id] = cpus; __cpu_logical_map[cpus] = id; cpus++; } } - cpu_present_map = cpu_possible_map; + +#ifdef CONFIG_HOTPLUG_CPU + /* + * The possible CPUs are all those present on the chip. We + * will assign CPU numbers for possible cores as well. Cores + * are always consecutively numberd from 0. + */ + for (id = 0; id < num_cores && id < NR_CPUS; id++) { + if (!(core_mask & (1 << id))) { + set_cpu_possible(cpus, true); + __cpu_number_map[id] = cpus; + __cpu_logical_map[cpus] = id; + cpus++; + } + } +#endif octeon_smp_hotplug_setup(); } |