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author | Ingo Molnar <mingo@elte.hu> | 2008-09-14 20:24:00 +0400 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-09-14 20:24:00 +0400 |
commit | 83bd6998b04fc1bb7280b14f16b2bdbdc07c914b (patch) | |
tree | af1bbe2bac5752b69b1ac58bf5d822c735da439b /arch/ia64/kernel | |
parent | e7250b8ae3870f37f660c2f65cafcaba85e3bfd3 (diff) | |
parent | adee14b2e1557d0a8559f29681732d05a89dfc35 (diff) | |
download | linux-83bd6998b04fc1bb7280b14f16b2bdbdc07c914b.tar.xz |
Merge commit 'v2.6.27-rc6' into timers/hpet
Diffstat (limited to 'arch/ia64/kernel')
-rw-r--r-- | arch/ia64/kernel/.gitignore | 1 | ||||
-rw-r--r-- | arch/ia64/kernel/asm-offsets.c | 10 | ||||
-rw-r--r-- | arch/ia64/kernel/head.S | 28 | ||||
-rw-r--r-- | arch/ia64/kernel/iosapic.c | 2 | ||||
-rw-r--r-- | arch/ia64/kernel/ivt.S | 4 | ||||
-rw-r--r-- | arch/ia64/kernel/jprobes.S | 2 | ||||
-rw-r--r-- | arch/ia64/kernel/module.c | 12 | ||||
-rw-r--r-- | arch/ia64/kernel/nr-irqs.c | 2 | ||||
-rw-r--r-- | arch/ia64/kernel/setup.c | 20 | ||||
-rw-r--r-- | arch/ia64/kernel/smp.c | 8 | ||||
-rw-r--r-- | arch/ia64/kernel/smpboot.c | 3 | ||||
-rw-r--r-- | arch/ia64/kernel/vmlinux.lds.S | 3 |
12 files changed, 70 insertions, 25 deletions
diff --git a/arch/ia64/kernel/.gitignore b/arch/ia64/kernel/.gitignore index 98307759a3b8..21cb0da5ded8 100644 --- a/arch/ia64/kernel/.gitignore +++ b/arch/ia64/kernel/.gitignore @@ -1 +1,2 @@ gate.lds +vmlinux.lds diff --git a/arch/ia64/kernel/asm-offsets.c b/arch/ia64/kernel/asm-offsets.c index c64a55af9b95..94c44b1ccfd0 100644 --- a/arch/ia64/kernel/asm-offsets.c +++ b/arch/ia64/kernel/asm-offsets.c @@ -10,11 +10,11 @@ #include <linux/pid.h> #include <linux/clocksource.h> #include <linux/kbuild.h> -#include <asm-ia64/processor.h> -#include <asm-ia64/ptrace.h> -#include <asm-ia64/siginfo.h> -#include <asm-ia64/sigcontext.h> -#include <asm-ia64/mca.h> +#include <asm/processor.h> +#include <asm/ptrace.h> +#include <asm/siginfo.h> +#include <asm/sigcontext.h> +#include <asm/mca.h> #include "../kernel/sigframe.h" #include "../kernel/fsyscall_gtod_data.h" diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S index db540e58c783..8bdea8eb62e3 100644 --- a/arch/ia64/kernel/head.S +++ b/arch/ia64/kernel/head.S @@ -359,7 +359,31 @@ start_ap: mov ar.rsc=0 // place RSE in enforced lazy mode ;; loadrs // clear the dirty partition - mov IA64_KR(PER_CPU_DATA)=r0 // clear physical per-CPU base + movl r19=__phys_per_cpu_start + mov r18=PERCPU_PAGE_SIZE + ;; +#ifndef CONFIG_SMP + add r19=r19,r18 + ;; +#else +(isAP) br.few 2f + mov r20=r19 + sub r19=r19,r18 + ;; + shr.u r18=r18,3 +1: + ld8 r21=[r20],8;; + st8[r19]=r21,8 + adds r18=-1,r18;; + cmp4.lt p7,p6=0,r18 +(p7) br.cond.dptk.few 1b +2: +#endif + tpa r19=r19 + ;; + .pred.rel.mutex isBP,isAP +(isBP) mov IA64_KR(PER_CPU_DATA)=r19 // per-CPU base for cpu0 +(isAP) mov IA64_KR(PER_CPU_DATA)=r0 // clear physical per-CPU base ;; mov ar.bspstore=r2 // establish the new RSE stack ;; @@ -1123,7 +1147,7 @@ SET_REG(b5); * p15 - used to track flag status. * * If you patch this code to use more registers, do not forget to update - * the clobber lists for spin_lock() in include/asm-ia64/spinlock.h. + * the clobber lists for spin_lock() in arch/ia64/include/asm/spinlock.h. */ #if (__GNUC__ == 3 && __GNUC_MINOR__ < 3) diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index 3bc2fa64f87f..5c4674ae8aea 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c @@ -69,7 +69,7 @@ * systems, we use one-to-one mapping between IA-64 vector and IRQ. A * platform can implement platform_irq_to_vector(irq) and * platform_local_vector_to_irq(vector) APIs to differentiate the mapping. - * Please see also include/asm-ia64/hw_irq.h for those APIs. + * Please see also arch/ia64/include/asm/hw_irq.h for those APIs. * * To sum up, there are three levels of mappings involved: * diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S index c39627df3cde..416a952b19bd 100644 --- a/arch/ia64/kernel/ivt.S +++ b/arch/ia64/kernel/ivt.S @@ -1243,11 +1243,11 @@ ENTRY(speculation_vector) add r17=r17,r18 // now add the offset ;; - MOV_FROM_IIP(r17) + MOV_TO_IIP(r17, r19) dep r16=0,r16,41,2 // clear EI ;; - MOV_FROM_IPSR(p0, r16) + MOV_TO_IPSR(p0, r16, r19) ;; RFI diff --git a/arch/ia64/kernel/jprobes.S b/arch/ia64/kernel/jprobes.S index 621630256c4a..f69389c7be1d 100644 --- a/arch/ia64/kernel/jprobes.S +++ b/arch/ia64/kernel/jprobes.S @@ -45,7 +45,7 @@ * to the correct location. */ #include <asm/asmmacro.h> -#include <asm-ia64/break.h> +#include <asm/break.h> /* * void jprobe_break(void) diff --git a/arch/ia64/kernel/module.c b/arch/ia64/kernel/module.c index 29aad349e0c4..545626f66a4c 100644 --- a/arch/ia64/kernel/module.c +++ b/arch/ia64/kernel/module.c @@ -31,9 +31,11 @@ #include <linux/elf.h> #include <linux/moduleloader.h> #include <linux/string.h> +#include <linux/uaccess.h> #include <linux/vmalloc.h> #include <asm/patch.h> +#include <asm/sections.h> #include <asm/unaligned.h> #define ARCH_MODULE_DEBUG 0 @@ -941,3 +943,13 @@ module_arch_cleanup (struct module *mod) if (mod->arch.core_unw_table) unw_remove_unwind_table(mod->arch.core_unw_table); } + +void *dereference_function_descriptor(void *ptr) +{ + struct fdesc *desc = ptr; + void *p; + + if (!probe_kernel_address(&desc->ip, p)) + ptr = p; + return ptr; +} diff --git a/arch/ia64/kernel/nr-irqs.c b/arch/ia64/kernel/nr-irqs.c index 1ae049181e83..8273afc32db8 100644 --- a/arch/ia64/kernel/nr-irqs.c +++ b/arch/ia64/kernel/nr-irqs.c @@ -9,7 +9,7 @@ #include <linux/kbuild.h> #include <linux/threads.h> -#include <asm-ia64/native/irq.h> +#include <asm/native/irq.h> void foo(void) { diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index e5c2de9b29a5..c27d5b2c182b 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -314,7 +314,7 @@ static inline void __init setup_crashkernel(unsigned long total, int *n) * * Setup the reserved memory areas set aside for the boot parameters, * initrd, etc. There are currently %IA64_MAX_RSVD_REGIONS defined, - * see include/asm-ia64/meminit.h if you need to define more. + * see arch/ia64/include/asm/meminit.h if you need to define more. */ void __init reserve_memory (void) @@ -927,17 +927,19 @@ cpu_init (void) if (smp_processor_id() == 0) { cpu_set(0, per_cpu(cpu_sibling_map, 0)); cpu_set(0, cpu_core_map[0]); + } else { + /* + * Set ar.k3 so that assembly code in MCA handler can compute + * physical addresses of per cpu variables with a simple: + * phys = ar.k3 + &per_cpu_var + * and the alt-dtlb-miss handler can set per-cpu mapping into + * the TLB when needed. head.S already did this for cpu0. + */ + ia64_set_kr(IA64_KR_PER_CPU_DATA, + ia64_tpa(cpu_data) - (long) __per_cpu_start); } #endif - /* - * We set ar.k3 so that assembly code in MCA handler can compute - * physical addresses of per cpu variables with a simple: - * phys = ar.k3 + &per_cpu_var - */ - ia64_set_kr(IA64_KR_PER_CPU_DATA, - ia64_tpa(cpu_data) - (long) __per_cpu_start); - get_max_cacheline_size(); /* diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c index 3676468612b6..da8f020d82c1 100644 --- a/arch/ia64/kernel/smp.c +++ b/arch/ia64/kernel/smp.c @@ -58,7 +58,7 @@ static struct local_tlb_flush_counts { unsigned int count; } __attribute__((__aligned__(32))) local_tlb_flush_counts[NR_CPUS]; -static DEFINE_PER_CPU(unsigned int, shadow_flush_counts[NR_CPUS]) ____cacheline_aligned; +static DEFINE_PER_CPU(unsigned short, shadow_flush_counts[NR_CPUS]) ____cacheline_aligned; #define IPI_CALL_FUNC 0 #define IPI_CPU_STOP 1 @@ -254,7 +254,7 @@ smp_local_flush_tlb(void) void smp_flush_tlb_cpumask(cpumask_t xcpumask) { - unsigned int *counts = __ia64_per_cpu_var(shadow_flush_counts); + unsigned short *counts = __ia64_per_cpu_var(shadow_flush_counts); cpumask_t cpumask = xcpumask; int mycpu, cpu, flush_mycpu = 0; @@ -262,7 +262,7 @@ smp_flush_tlb_cpumask(cpumask_t xcpumask) mycpu = smp_processor_id(); for_each_cpu_mask(cpu, cpumask) - counts[cpu] = local_tlb_flush_counts[cpu].count; + counts[cpu] = local_tlb_flush_counts[cpu].count & 0xffff; mb(); for_each_cpu_mask(cpu, cpumask) { @@ -276,7 +276,7 @@ smp_flush_tlb_cpumask(cpumask_t xcpumask) smp_local_flush_tlb(); for_each_cpu_mask(cpu, cpumask) - while(counts[cpu] == local_tlb_flush_counts[cpu].count) + while(counts[cpu] == (local_tlb_flush_counts[cpu].count & 0xffff)) udelay(FLUSH_DELAY); preempt_enable(); diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index 03f1a9908afc..bcea81e432fd 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c @@ -138,6 +138,7 @@ cpumask_t cpu_possible_map = CPU_MASK_NONE; EXPORT_SYMBOL(cpu_possible_map); cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; +EXPORT_SYMBOL(cpu_core_map); DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); @@ -467,7 +468,9 @@ start_secondary (void *unused) { /* Early console may use I/O ports */ ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); +#ifndef CONFIG_PRINTK_TIME Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); +#endif efi_map_pal_code(); cpu_init(); preempt_disable(); diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S index 5a77206c2492..de71da811cd6 100644 --- a/arch/ia64/kernel/vmlinux.lds.S +++ b/arch/ia64/kernel/vmlinux.lds.S @@ -215,6 +215,9 @@ SECTIONS /* Per-cpu data: */ percpu : { } :percpu . = ALIGN(PERCPU_PAGE_SIZE); +#ifdef CONFIG_SMP + . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */ +#endif __phys_per_cpu_start = .; .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET) { |