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author | Joel Stanley <joel@jms.id.au> | 2018-02-08 07:52:42 +0300 |
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committer | Joel Stanley <joel@jms.id.au> | 2018-02-08 07:56:02 +0300 |
commit | 6f62ab6a9159bda4a1d9bdc4f707bcffcff8eff5 (patch) | |
tree | 5d29f703facefe6675d34847bddba22caab499d0 /arch/arm | |
parent | bd30f039e43a91876891152145b1b517d1d852aa (diff) | |
download | linux-6f62ab6a9159bda4a1d9bdc4f707bcffcff8eff5.tar.xz |
ARM: dts: aspeed-g4: Add reset phandles to ADC and PWM
OpenBMC-Staging-Count: 1
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index d53bc6daea9c..1fb5b410917a 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -126,6 +126,7 @@ compatible = "aspeed,ast2400-adc"; reg = <0x1e6e9000 0xb0>; clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_ADC>; #io-channel-cells = <1>; status = "disabled"; }; @@ -193,6 +194,7 @@ #size-cells = <0>; reg = <0x1e786000 0x1000>; clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_PWM>; status = "disabled"; }; |