diff options
| author | Shawn Lin <shawn.lin@rock-chips.com> | 2017-07-19 12:57:56 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-08-29 21:18:05 +0300 |
| commit | e9a60cac89ab75fad51c12912b489043087beb90 (patch) | |
| tree | 65d81f07582b6ad80f04f41e987a2f9d33868f3e /arch/arm64 | |
| parent | f06c6c41e6ccf9c1ec61f640cc9090308b8a63fd (diff) | |
| download | linux-e9a60cac89ab75fad51c12912b489043087beb90.tar.xz | |
arm64: dts: rockchip: convert PCIe to use per-lane PHYs for rk3339
Convert all RK3399 platforms to use per-lane PHY model in order to save
more power by idling unused lane(s).
Tested-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 69c56f7316c4..5b78ce16a87e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -238,8 +238,10 @@ linux,pci-domain = <0>; max-link-speed = <1>; msi-map = <0x0 &its 0x0 0x1000>; - phys = <&pcie_phy>; - phy-names = "pcie-phy"; + phys = <&pcie_phy 0>, <&pcie_phy 1>, + <&pcie_phy 2>, <&pcie_phy 3>; + phy-names = "pcie-phy-0", "pcie-phy-1", + "pcie-phy-2", "pcie-phy-3"; ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000 0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>; resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, @@ -1295,7 +1297,7 @@ compatible = "rockchip,rk3399-pcie-phy"; clocks = <&cru SCLK_PCIEPHY_REF>; clock-names = "refclk"; - #phy-cells = <0>; + #phy-cells = <1>; resets = <&cru SRST_PCIEPHY>; reset-names = "phy"; status = "disabled"; |