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author | Rafael J. Wysocki <rjw@sisk.pl> | 2009-12-06 18:06:11 +0300 |
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committer | Rafael J. Wysocki <rjw@sisk.pl> | 2009-12-06 18:06:11 +0300 |
commit | 64357ed468025614d48daa6cc87674ae5616f8fb (patch) | |
tree | 2467c239364d7602755b73203025d329c6f84b22 /arch/arm/mm/mmu.c | |
parent | be404f0212ffa8f67361f8ee460a25d901d88991 (diff) | |
parent | 6ec22f9b037fc0c2e00ddb7023fad279c365324d (diff) | |
download | linux-64357ed468025614d48daa6cc87674ae5616f8fb.tar.xz |
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r-- | arch/arm/mm/mmu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 02243eeccf50..ea67be0223ac 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p) } if (i == ARRAY_SIZE(cache_policies)) printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); + /* + * This restriction is partly to do with the way we boot; it is + * unpredictable to have memory mapped using two different sets of + * memory attributes (shared, type, and cache attribs). We can not + * change these attributes once the initial assembly has setup the + * page tables. + */ if (cpu_architecture() >= CPU_ARCH_ARMv6) { printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); cachepolicy = CPOLICY_WRITEBACK; |