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author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2010-11-24 06:54:21 +0300 |
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committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-18 16:02:16 +0300 |
commit | 3f408fa071418183742110f7314d6b596916e31e (patch) | |
tree | d5ecfe564d7d53c436bf1989ff49ddb635e398ff /arch/arm/mm/Kconfig | |
parent | c9b5ef47dc9d154a79f320eeaddc4bc9684ae1ea (diff) | |
download | linux-3f408fa071418183742110f7314d6b596916e31e.tar.xz |
ARM: mmp: select CPU_PJ4
Since CPU_PJ4 is shared between PXA95x and MMP2, select CPU_PJ4 in MMP2
configuration.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r-- | arch/arm/mm/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index ede1763429a3..a099efed0e63 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -795,7 +795,7 @@ config CACHE_PL310 config CACHE_TAUROS2 bool "Enable the Tauros2 L2 cache controller" - depends on (ARCH_DOVE || ARCH_MMP) + depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4) default y select OUTER_CACHE help |