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| author | Arnd Bergmann <arnd@arndb.de> | 2012-03-05 01:09:11 +0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-03-05 01:20:46 +0400 |
| commit | 709baa67c676a187a63c0f0f40efceb3fb1eef72 (patch) | |
| tree | 0a2b8bab5ac4f52069a1e50d20028ae44d8c256a /arch/arm/mach-tegra/board-paz00.c | |
| parent | 281a9f78eaa5d0d78bd0e3acd181a24d3bad28e3 (diff) | |
| parent | 8c690fdf465be9d97229f6bb0e6346624d6753a9 (diff) | |
| download | linux-709baa67c676a187a63c0f0f40efceb3fb1eef72.tar.xz | |
Merge tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/soc2
From: Olof Johansson <olof@lixom.net>
Tegra 30 SMP support
I did this as a separate topic branch because it depends on both the
soc and the soc-drivers branch, so it brings both of those in as a base.
This branch contains work to enable SMP support on Tegra30 and reworks
some of the SMP bringup for T20 as well.
It also contains a device tree patch that builds on top of the SMP/clock
changes in the rest of the branch, so it made more sense to apply it
here than deal with the merge conflicts back and forth.
* tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: dt: Explicitly configure all serial ports on Tegra Cardhu
ARM: tegra: support for secondary cores on Tegra30
ARM: tegra: support for Tegra30 CPU powerdomains
ARM: tegra: add support for Tegra30 powerdomains
ARM: tegra: export tegra_powergate_is_powered()
ARM: tegra: prepare powergate.c for multiple variants
ARM: tegra: rework Tegra secondary CPU core bringup
ARM: tegra: functions to access the flowcontroller
ARM: tegra: initialize Tegra chipid early
ARM: tegra: export Tegra chipid
ARM: tegra: cleanup use of chipid register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-tegra/board-paz00.c')
| -rw-r--r-- | arch/arm/mach-tegra/board-paz00.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index fcf4f377b1dc..330afdfa2475 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c @@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { .uartclk = 216000000, }, { /* serial port on mini-pcie */ - .membase = IO_ADDRESS(TEGRA_UARTD_BASE), - .mapbase = TEGRA_UARTD_BASE, - .irq = INT_UARTD, + .membase = IO_ADDRESS(TEGRA_UARTC_BASE), + .mapbase = TEGRA_UARTC_BASE, + .irq = INT_UARTC, .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, .type = PORT_TEGRA, .iotype = UPIO_MEM, @@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline, static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = { /* name parent rate enabled */ { "uarta", "pll_p", 216000000, true }, - { "uartd", "pll_p", 216000000, true }, + { "uartc", "pll_p", 216000000, true }, { "pll_p_out4", "pll_p", 24000000, true }, { "usbd", "clk_m", 12000000, false }, |