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| author | Linus Walleij <linus.walleij@linaro.org> | 2013-09-10 13:19:55 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-09-27 16:15:07 +0400 |
| commit | 8040dd09c2ca7e70daf84f040beb3ced9602fce5 (patch) | |
| tree | c57e492d4d402a07c7585207a063545f50abc77d /arch/arm/mach-ixp4xx/ixdp425-setup.c | |
| parent | 272b98c6455f00884f0350f775c5342358ebb73f (diff) | |
| download | linux-8040dd09c2ca7e70daf84f040beb3ced9602fce5.tar.xz | |
ARM: ixp4xx: convert remaining users to use gpiolib
A few call sites inside mach-ixp4xx were still using the custom
ixp4xx GPIO API with gpio_line_* accessors, convert all these
to use the standard gpiolib functions instead. Also attempt to
request and label all GPIOs before use. Move the GPIO requests
to per-machine device_initcalls() so we are not dependent on the
GPIO chip to be available at machine_init time.
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ixp4xx/ixdp425-setup.c')
| -rw-r--r-- | arch/arm/mach-ixp4xx/ixdp425-setup.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 22d688b7d513..e7b8befa8729 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -20,6 +20,7 @@ #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> #include <linux/delay.h> +#include <linux/gpio.h> #include <asm/types.h> #include <asm/setup.h> #include <asm/memory.h> @@ -80,10 +81,10 @@ ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_NCE) { - gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW); + gpio_set_value(IXDP425_NAND_NCE_PIN, 0); udelay(5); } else - gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH); + gpio_set_value(IXDP425_NAND_NCE_PIN, 1); offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0; offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0; @@ -227,7 +228,8 @@ static void __init ixdp425_init(void) ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3), ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1; - gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT); + gpio_request(IXDP425_NAND_NCE_PIN, "NAND NCE pin"); + gpio_direction_output(IXDP425_NAND_NCE_PIN, 0); /* Configure expansion bus for NAND Flash */ *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN | |