diff options
author | Rob Herring <rob.herring@calxeda.com> | 2011-06-29 06:16:13 +0400 |
---|---|---|
committer | Rob Herring <rob.herring@calxeda.com> | 2011-07-12 20:19:29 +0400 |
commit | c9d95fbe59e426eed7f16e7cac812e46ac4772d0 (patch) | |
tree | 7e7c01255fb18932ee4f0c68b1501ab35db7c012 /arch/arm/mach-ixp2000 | |
parent | dc8d966bccde0b8b6c9e8c6e663c747030c17435 (diff) | |
download | linux-c9d95fbe59e426eed7f16e7cac812e46ac4772d0.tar.xz |
ARM: convert PCI defines to variables
Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow
multi-platform builds. This also removes the requirement for a platform to
have a mach/hardware.h.
The default values for i/o and mem are 0x1000 and 0x01000000, respectively.
Per Arnd Bergmann, other values are likely to be incorrect, but this commit
does not try to address that issue.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ixp2000')
-rw-r--r-- | arch/arm/mach-ixp2000/include/mach/hardware.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-ixp2000/pci.c | 3 |
2 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/mach-ixp2000/include/mach/hardware.h b/arch/arm/mach-ixp2000/include/mach/hardware.h index 6c92008aff45..cdaf1db84003 100644 --- a/arch/arm/mach-ixp2000/include/mach/hardware.h +++ b/arch/arm/mach-ixp2000/include/mach/hardware.h @@ -19,12 +19,6 @@ #ifndef __ASM_ARCH_HARDWARE_H__ #define __ASM_ARCH_HARDWARE_H__ -/* - * This needs to be platform-specific? - */ -#define PCIBIOS_MIN_IO 0x00000000 -#define PCIBIOS_MIN_MEM 0x00000000 - #include "ixp2000-regs.h" /* Chipset Registers */ /* diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c index 8888ed9429f8..f5098b306fd3 100644 --- a/arch/arm/mach-ixp2000/pci.c +++ b/arch/arm/mach-ixp2000/pci.c @@ -198,6 +198,9 @@ ixp2000_pci_preinit(void) { pci_set_flags(0); + pcibios_min_io = 0; + pcibios_min_mem = 0; + #ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO /* * Configure the PCI unit to properly byteswap I/O transactions, |