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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-06-17 22:54:25 +0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-06-17 22:54:25 +0400
commit0e496b8e84410c96d1ffc86f0b37b0328a4234da (patch)
treed8a2aeeaee03eb4f305ba4dc5ab9395c4ee31321 /arch/arm/include
parent214da6728acac285cac0e8e9b6c4c13838b8e1b0 (diff)
parent7d132055814ef17a6c7b69f342244c410a5e000f (diff)
downloadlinux-0e496b8e84410c96d1ffc86f0b37b0328a4234da.tar.xz
Merge 3.10-rc6 into char-misc-next
We want the fixes in here.
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/percpu.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h
index 968c0a14e0a3..209e6504922e 100644
--- a/arch/arm/include/asm/percpu.h
+++ b/arch/arm/include/asm/percpu.h
@@ -30,8 +30,15 @@ static inline void set_my_cpu_offset(unsigned long off)
static inline unsigned long __my_cpu_offset(void)
{
unsigned long off;
- /* Read TPIDRPRW */
- asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : : "memory");
+ register unsigned long *sp asm ("sp");
+
+ /*
+ * Read TPIDRPRW.
+ * We want to allow caching the value, so avoid using volatile and
+ * instead use a fake stack read to hazard against barrier().
+ */
+ asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp));
+
return off;
}
#define __my_cpu_offset __my_cpu_offset()