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| author | Will Deacon <will.deacon@arm.com> | 2012-09-01 08:22:12 +0400 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2012-11-09 18:13:20 +0400 |
| commit | 26ffd0d43b186b0d5186354da8714a1c2d360df0 (patch) | |
| tree | 405c83d298530b65bb64630da52cfb368927691a /arch/arm/include/asm/pgtable-2level.h | |
| parent | dbf62d50067e55a782583fe53c3d2a3d98b1f6f3 (diff) | |
| download | linux-26ffd0d43b186b0d5186354da8714a1c2d360df0.tar.xz | |
ARM: mm: introduce present, faulting entries for PAGE_NONE
PROT_NONE mappings apply the page protection attributes defined by _P000
which translate to PAGE_NONE for ARM. These attributes specify an XN,
RDONLY pte that is inaccessible to userspace. However, on kernels
configured without support for domains, such a pte *is* accessible to
the kernel and can be read via get_user, allowing tasks to read
PROT_NONE pages via syscalls such as read/write over a pipe.
This patch introduces a new software pte flag, L_PTE_NONE, that is set
to identify faulting, present entries.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/include/asm/pgtable-2level.h')
| -rw-r--r-- | arch/arm/include/asm/pgtable-2level.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h index c44a1ecfc28a..f97ee02386ee 100644 --- a/arch/arm/include/asm/pgtable-2level.h +++ b/arch/arm/include/asm/pgtable-2level.h @@ -124,6 +124,7 @@ #define L_PTE_USER (_AT(pteval_t, 1) << 8) #define L_PTE_XN (_AT(pteval_t, 1) << 9) #define L_PTE_SHARED (_AT(pteval_t, 1) << 10) /* shared(v6), coherent(xsc3) */ +#define L_PTE_NONE (_AT(pteval_t, 1) << 11) /* * These are the memory types, defined to be compatible with |