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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2020-07-10 08:19:37 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-07-13 14:48:53 +0300 |
| commit | fa28d8212ede9c533ae87a737571a9d3b3eebb29 (patch) | |
| tree | 72b8f82b0e6c85a4703e88864b738e5025e8f270 /arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi | |
| parent | 5c73d9acd1220d4ae32d3803a8e3205f994ef7c7 (diff) | |
| download | linux-fa28d8212ede9c533ae87a737571a9d3b3eebb29.tar.xz | |
ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.
This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi index 9ebd438dce7d..019938562aa9 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi @@ -218,6 +218,7 @@ }; &pwm1 { + #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; |