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authorGrant Likely <grant.likely@linaro.org>2013-08-28 23:18:13 +0400
committerGrant Likely <grant.likely@linaro.org>2013-08-28 23:18:13 +0400
commit8be137f2664f0abb096626a9d2ce0fcdd955b109 (patch)
tree2c53a5535265a58eb397d6fbbab2ec26e92e6931 /arch/arc
parent8851b9f1625ce0858e9b1bb0ae4a57d4b43178b1 (diff)
parentd8dfad3876e4386666b759da3c833d62fb8b2267 (diff)
downloadlinux-8be137f2664f0abb096626a9d2ce0fcdd955b109.tar.xz
Merge tag 'v3.11-rc7' into devicetree/next
Linux 3.11-rc7
Diffstat (limited to 'arch/arc')
-rw-r--r--arch/arc/include/asm/entry.h1
-rw-r--r--arch/arc/lib/strchr-700.S10
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h
index 8943c028d4bb..df57611652e5 100644
--- a/arch/arc/include/asm/entry.h
+++ b/arch/arc/include/asm/entry.h
@@ -38,6 +38,7 @@
#include <asm/ptrace.h>
#include <asm/processor.h> /* For VMALLOC_START */
#include <asm/thread_info.h> /* For THREAD_SIZE */
+#include <asm/mmu.h>
/* Note on the LD/ST addr modes with addr reg wback
*
diff --git a/arch/arc/lib/strchr-700.S b/arch/arc/lib/strchr-700.S
index 99c10475d477..9c548c7cf001 100644
--- a/arch/arc/lib/strchr-700.S
+++ b/arch/arc/lib/strchr-700.S
@@ -39,9 +39,18 @@ ARC_ENTRY strchr
ld.a r2,[r0,4]
sub r12,r6,r7
bic r12,r12,r6
+#ifdef __LITTLE_ENDIAN__
and r7,r12,r4
breq r7,0,.Loop ; For speed, we want this branch to be unaligned.
b .Lfound_char ; Likewise this one.
+#else
+ and r12,r12,r4
+ breq r12,0,.Loop ; For speed, we want this branch to be unaligned.
+ lsr_s r12,r12,7
+ bic r2,r7,r6
+ b.d .Lfound_char_b
+ and_s r2,r2,r12
+#endif
; /* We require this code address to be unaligned for speed... */
.Laligned:
ld_s r2,[r0]
@@ -95,6 +104,7 @@ ARC_ENTRY strchr
lsr r7,r7,7
bic r2,r7,r6
+.Lfound_char_b:
norm r2,r2
sub_s r0,r0,4
asr_s r2,r2,3