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author | Wenyou Yang <wenyou.yang@atmel.com> | 2016-05-09 09:51:18 +0300 |
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committer | Brian Norris <computersforpeace@gmail.com> | 2016-05-26 06:06:28 +0300 |
commit | 53b74ed2d0b4170764bf6d4cba6b786be1cab846 (patch) | |
tree | 2910d57ff00dc12aaeb96eda651c2eefdc3910df /Documentation/devicetree/bindings/input | |
parent | e5366a266a8cd4cd6b0fe66876462cca2e1c6a89 (diff) | |
download | linux-53b74ed2d0b4170764bf6d4cba6b786be1cab846.tar.xz |
Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"
This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable
RB_EDGE interrupts")
Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR
register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy
line edge status bit. It is a datasheet bug.
Cc: <stable@vger.kernel.org>
Fixes: commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts")
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/input')
0 files changed, 0 insertions, 0 deletions