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| author | Alan Chiang <alanx.chiang@intel.com> | 2018-07-25 06:20:21 +0300 |
|---|---|---|
| committer | Bartosz Golaszewski <brgl@bgdev.pl> | 2018-07-25 10:17:24 +0300 |
| commit | 21d04054501fb27b56e995b54ac74e39aee79a46 (patch) | |
| tree | 785b24257957ae2c860b69881e470bbb542a7407 /Documentation/devicetree/bindings/eeprom | |
| parent | d72e90f33aa4709ebecc5005562f52335e106a60 (diff) | |
| download | linux-21d04054501fb27b56e995b54ac74e39aee79a46.tar.xz | |
dt-bindings: at24: Add address-width property
Currently the only way to use a variant of a supported model with
a different address width is to define a new compatible string and
the corresponding chip data structure.
Provide a flexible way to specify the size of the address pointer
by defining a new property: address-width.
Signed-off-by: Alan Chiang <alanx.chiang@intel.com>
Signed-off-by: Andy Yeh <andy.yeh@intel.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
[Bartosz: fixed the commit message]
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Diffstat (limited to 'Documentation/devicetree/bindings/eeprom')
| -rw-r--r-- | Documentation/devicetree/bindings/eeprom/at24.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt index 61d833abafbf..aededdbc262b 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.txt +++ b/Documentation/devicetree/bindings/eeprom/at24.txt @@ -72,6 +72,8 @@ Optional properties: - wp-gpios: GPIO to which the write-protect pin of the chip is connected. + - address-width: number of address bits (one of 8, 16). + Example: eeprom@52 { |