<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/sound/soc/sof/intel/bdw.c, branch dev-5.2</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2019-06-03T16:56:38+00:00</updated>
<entry>
<title>ASoC: SOF: fix DSP oops definitions in FW ABI</title>
<updated>2019-06-03T16:56:38+00:00</updated>
<author>
<name>Kai Vehmanen</name>
<email>kai.vehmanen@linux.intel.com</email>
</author>
<published>2019-06-03T16:18:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=14104eb6a351a5bad21fdd2cf05ca46ad5e5beab'/>
<id>urn:sha1:14104eb6a351a5bad21fdd2cf05ca46ad5e5beab</id>
<content type='text'>
The definitions for DSP oops structures were not aligned
correctly to current FW ABI version 3.6.0, leading to
invalid data being printed out to debug logs. Fix the structs
and update related platform code accordingly.

Signed-off-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: ipc: fix a race, leading to IPC timeouts</title>
<updated>2019-05-28T14:48:47+00:00</updated>
<author>
<name>Guennadi Liakhovetski</name>
<email>guennadi.liakhovetski@linux.intel.com</email>
</author>
<published>2019-05-24T19:09:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1183e9a634db06825da7faba566bce50afde4357'/>
<id>urn:sha1:1183e9a634db06825da7faba566bce50afde4357</id>
<content type='text'>
Currently on all supported platforms the IPC IRQ thread first signals
the sender when an IPC response is received from the DSP, then unmasks
the IPC interrupt. Those actions are performed without holding any
locks, so the thread can be interrupted between them. IPC timeouts
have been observed in such scenarios: if the sender is woken up and it
proceeds with sending the next message without unmasking the IPC
interrupt, it can miss the next response. This patch takes a spin-lock
to prevent the IRQ thread from being preempted at that point. It also
makes sure, that the next IPC transmission by the host cannot take
place before the IRQ thread has finished updating all the required IPC
registers.

Fixes: 53e0c72d98b ("ASoC: SOF: Add support for IPC IO between DSP and Host")
Reviewed-by: Takashi Iwai &lt;tiwai@suse.de&gt;
Signed-off-by: Guennadi Liakhovetski &lt;guennadi.liakhovetski@linux.intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: Add BDW HW DSP support</title>
<updated>2019-04-27T17:50:37+00:00</updated>
<author>
<name>Liam Girdwood</name>
<email>liam.r.girdwood@linux.intel.com</email>
</author>
<published>2019-04-12T16:08:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=458bc7296184729b5462f704fb0792b6f1676f0d'/>
<id>urn:sha1:458bc7296184729b5462f704fb0792b6f1676f0d</id>
<content type='text'>
Add SOF support for Intel Broadwell based devices.

Signed-off-by: Rander Wang &lt;rander.wang@linux.intel.com&gt;
Signed-off-by: Pan Xiuli &lt;xiuli.pan@linux.intel.com&gt;
Signed-off-by: Liam Girdwood &lt;liam.r.girdwood@linux.intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Takashi Iwai &lt;tiwai@suse.de&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
</feed>
