<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/include, branch dev-5.14-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.14-intel</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.14-intel'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2021-10-19T22:10:39+00:00</updated>
<entry>
<title>soc: aspeed: lpc-sio: add SMI event triggering support</title>
<updated>2021-10-19T22:10:39+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-08-12T22:40:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c2b347a07158a30215720ad0ab9f109e4b449189'/>
<id>urn:sha1:c2b347a07158a30215720ad0ab9f109e4b449189</id>
<content type='text'>
Add SMI event triggering support.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
Change-Id: I711b5642a654e671a2d97d3079e3a1a055d400a0
</content>
</entry>
<entry>
<title>mailbox: ioctl to fetch mailbox size</title>
<updated>2021-10-19T22:10:38+00:00</updated>
<author>
<name>Arun P. Mohanan</name>
<email>arun.p.m@linux.intel.com</email>
</author>
<published>2021-03-18T10:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=77e17b1e75532fad41d20a04429335bc5f8242e9'/>
<id>urn:sha1:77e17b1e75532fad41d20a04429335bc5f8242e9</id>
<content type='text'>
The size of mailbox differ from AST2500, AST2600 A0 and A1. Add an ioctl
support to fetch the mailbox size.

Tested:
Verfied ioctl call returns mailbox size as expected.

Change-Id: I4e261aaf8aa3fb108d6ad152d30a17b114d70ccd
Signed-off-by: Arun P. Mohanan &lt;arun.p.m@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Move JTAG state matrix to JTAG core header file</title>
<updated>2021-10-19T22:10:38+00:00</updated>
<author>
<name>Castro, Omar Eduardo</name>
<email>omar.eduardo.castro@intel.com</email>
</author>
<published>2021-03-05T19:34:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e0ffca8e4f9ad7dd89a462c63faee606fd2359eb'/>
<id>urn:sha1:e0ffca8e4f9ad7dd89a462c63faee606fd2359eb</id>
<content type='text'>
- Move TDI state matrix to core header file
- These changes are done based on feedback from Paul
  Fertser, from the OpenOCD.

Test:
SPR ASD Sanity and jtag_test finished successfully.
ICX ASD Sanity and jtag_test finished successfully.

Change-Id: Idb612e50d5a8ea5929f7c9241d279c345587983a
Signed-off-by: Castro, Omar Eduardo &lt;omar.eduardo.castro@intel.com&gt;
</content>
</entry>
<entry>
<title>ASD Prevent TDI remaining bits to be override during JTAG xfer</title>
<updated>2021-10-19T22:10:38+00:00</updated>
<author>
<name>Ernesto Corona</name>
<email>ernesto.corona@intel.com</email>
</author>
<published>2021-03-04T00:11:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=98b171955ae9f0860fc3313fddf4d081e8517b57'/>
<id>urn:sha1:98b171955ae9f0860fc3313fddf4d081e8517b57</id>
<content type='text'>
JTAG xfer length is measured in bits and it is allowed to send non 8-bit
aligned xfers. For such xfers we will read the content of the remaining
bits in the last byte of tdi buffer and restore those bits along with
the xfer readback.

Add also linux types to JTAG header to remove external dependencies.

Test:
SPR ASD Sanity and jtag_test finished successfully.
SKX ASD Sanity and jtag_test finished successfully.

Signed-off-by: Ernesto Corona &lt;ernesto.corona@intel.com&gt;
</content>
</entry>
<entry>
<title>mfd: peci: Add ICX-D generation info</title>
<updated>2021-10-19T22:10:37+00:00</updated>
<author>
<name>Saravanan Palanisamy</name>
<email>saravanan.palanisamy@intel.com</email>
</author>
<published>2020-05-15T17:40:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f0d3d1f57ec93c1acd390137b7a2cd704f54a770'/>
<id>urn:sha1:f0d3d1f57ec93c1acd390137b7a2cd704f54a770</id>
<content type='text'>
This commit adds CPU generation info for ICX-D Xeon family.

Signed-off-by: Saravanan Palanisamy &lt;saravanan.palanisamy@intel.com&gt;
Signed-off-by: Anoop S &lt;anoopx.s@intel.com&gt;
</content>
</entry>
<entry>
<title>mfd: peci: Add ICX generation info</title>
<updated>2021-10-19T22:10:37+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2018-11-07T00:25:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=353ca49aeb4359fe0e35f90b07b1cc8dad438e97'/>
<id>urn:sha1:353ca49aeb4359fe0e35f90b07b1cc8dad438e97</id>
<content type='text'>
This commit adds CPU generation info for ICX family.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: Export function used to read BDF</title>
<updated>2021-10-19T22:10:37+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2021-01-28T21:31:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8414dc5fd37b29d3d4a2ec5cfe2a06bfccc53fbd'/>
<id>urn:sha1:8414dc5fd37b29d3d4a2ec5cfe2a06bfccc53fbd</id>
<content type='text'>
Recently, aspeed-mctp driver functionality was extended to store BDF
values for already discovered MCTP endpoints on PCIe bus.
Let's expose kernel API to read BDF based on endpoint ID.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>Fix reset index of LPC and eSPI</title>
<updated>2021-10-19T22:10:36+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-01-12T16:57:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=478ec6d3e885f5219b37b9820babea9e031fd1e2'/>
<id>urn:sha1:478ec6d3e885f5219b37b9820babea9e031fd1e2</id>
<content type='text'>
AST2600 A1 has separate reset control for LPC and eSPI so this
commit fix the index definition to make it work on AST2600 A1.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>Update I3C drivers</title>
<updated>2021-10-19T22:10:35+00:00</updated>
<author>
<name>Dylan Hung</name>
<email>dylan_hung@aspeedtech.com</email>
</author>
<published>2020-12-14T01:29:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=069fbe14a7bb0e45664cd4efed7a990218bbfdc3'/>
<id>urn:sha1:069fbe14a7bb0e45664cd4efed7a990218bbfdc3</id>
<content type='text'>
This commit ports I3C updates from Aspeed SDK v00.06.00.

Note: Should be refined to get upstreamed.

Signed-off-by: Dylan Hung &lt;dylan_hung@aspeedtech.com&gt;
</content>
</entry>
<entry>
<title>peci: Add peci_revision property</title>
<updated>2021-10-19T22:10:35+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2020-12-06T13:16:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=98972afbfa8c6cbfd686cd23f8f2e70d646b864a'/>
<id>urn:sha1:98972afbfa8c6cbfd686cd23f8f2e70d646b864a</id>
<content type='text'>
Right now, PECI revision is determined using a result of GetDIB() PECI
command. Because GetDIB() may not be supported by all type of physical
media that provides PECI, we need an alternative.
Until we figure how to determine PECI revision there (if we can't do
that, we'll fallback to device tree), let's allow to hardcode PECI
revision as a property of hardware adapter.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
</feed>
