BMC/Intel-BMC/linux.git/include, branch dev-4.7

drivers: fsi: Fix SBE/OCC for 2 socket properly.

2017-05-24T05:06:26+00:00

Also update dts. Signed-off-by: Edward A. James Signed-off-by: Patrick Williams Reviewed-by: Christopher Bostic

drivers: fsi: sbefifo: Add in-kernel API

2017-05-02T15:06:34+00:00

Add exported functions to the SBEFIFO driver to open/write/read/close from within the kernel. Signed-off-by: Edward A. James Signed-off-by: Patrick Williams

serial: 8250: Add flag so drivers can avoid probe

2017-03-27T22:51:02+00:00

The probing of THRE irq behaviour assumes the other end will be reading bytes out of the buffer in order to probe the port at driver init. In some cases the other end cannot be relied upon to read these bytes, so provide a flag for them to skip this step. Bit 16 was chosen as the flags are a int and the top bits are taken. Acked-by: Benjamin Herrenschmidt Signed-off-by: Joel Stanley

drivers: fsi: i2c: add driver file operations and bus locking

2017-02-03T00:21:44+00:00

Signed-off-by: Edward A. James Signed-off-by: Joel Stanley

drivers/fsi: Add slave interrupt polling

2017-02-03T00:15:35+00:00

Scan slaves present for asserting interrupt signals in the si1s register and call a registered client's interrupt handler as appropriate. Signed-off-by: Eddie James Signed-off-by: Christopher Bostic Signed-off-by: Joel Stanley

uapi: aspeed-lpc-ctrl: Update userspace structure

2017-01-16T23:46:29+00:00

Benjamin Herrenschmidt wrote: > The implicit padding is a matter of ABI more than C standard, we > already rely on this in a bazillion of places but it *has* bitten us in > a few corner cases (mostly when u64 is involved due to ABI differences > between 32-bit and 64-bit), so explicit padding is indeed preferred. > > Cyril can you respin with: > > struct aspeed_lpc_ctrl_mapping { > __u8 window_type; > __u8 window_id; > __u16 pad; > __u32 addr; > __u32 offset; > __u32 size; > > I prefer that, it makes more sense to keep the window type/id at the > top. Alternatively call "pad", "flags", and describe that clients must > zero it, that way we can use it for future extensions of we ever have > to. We have gone with the flags option. Signed-off-by: Joel Stanley

drivers/misc: Add Aspeed LPC control driver

2017-01-16T00:19:03+00:00

In order to manage server systems, there is typically another processor known as a BMC (Baseboard Management Controller) which is responsible for powering the server and other various elements, sometimes fans, often the system flash. The Aspeed BMC family which is what is used on OpenPOWER machines and a number of x86 as well is typically connected to the host via an LPC (Low Pin Count) bus (among others). The LPC bus is an ISA bus on steroids. It's generally used by the BMC chip to provide the host with access to the system flash (via MEM/FW cycles) that contains the BIOS or other host firmware along with a number of SuperIO-style IOs (via IO space) such as UARTs, IPMI controllers. On the BMC chip side, this is all configured via a bunch of registers whose content is related to a given policy of what devices are exposed at a per system level, which is system/vendor specific, so we don't want to bolt that into the BMC kernel. This started with a need to provide something nicer than /dev/mem for user space to configure these things. One important aspect of the configuration is how the MEM/FW space is exposed to the host (ie, the x86 or POWER). Some registers in that bridge can define a window remapping all or portion of the LPC MEM/FW space to a portion of the BMC internal bus, with no specific limits imposed in HW. I think it makes sense to ensure that this window is configured by a kernel driver that can apply some serious sanity checks on what it is configured to map. In practice, user space wants to control this by flipping the mapping between essentially two types of portions of the BMC address space: - The flash space. This is a region of the BMC MMIO space that more/less directly maps the system flash (at least for reads, writes are somewhat more complicated). - One (or more) reserved area(s) of the BMC physical memory. The latter is needed for a number of things, such as avoiding letting the host manipulate the innards of the BMC flash controller via some evil backdoor, we want to do flash updates by routing the window to a portion of memory (under control of a mailbox protocol via some separate set of registers) which the host can use to write new data in bulk and then request the BMC to flash it. There are other uses, such as allowing the host to boot from an in-memory flash image rather than the one in flash (very handy for continuous integration and test, the BMC can just download new images). It is important to note that due to the way the ASpeed chip lets the kernel configure the mapping between host LPC addresses and BMC ram addresses the offset within the window must be a multiple of size. Not doing so will fragment the accessible space rather than simply moving 'zero' upwards. This is caused by the nature of HICR8 being a mask and the way host LPC addresses are translated. Signed-off-by: Cyril Bur [joel: Apply v3 from http://patchwork.ozlabs.org/patch/715545/ with small fixes] Signed-off-by: Joel Stanley

gpio: dt-bindings: Fix typo in two-letter ports

2017-01-13T08:44:55+00:00

Add missing port AC. Signed-off-by: Xo Wang Signed-off-by: Joel Stanley

drivers/fsi: Add client driver register utilities

2016-12-08T10:41:36+00:00

Add driver_register and driver_unregister wrappers for FSI. Signed-off-by: Chris Bostic Signed-off-by: Joel Stanley

drivers/fsi: Add master unscan

2016-12-08T10:40:24+00:00

Allow a master to undo a previous scan. Should a master scan a bus twice it will need to ensure it doesn't double register any previously detected device. Signed-off-by: Chris Bostic Signed-off-by: Joel Stanley