<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/include/uapi/linux/kvm.h, branch dev-4.7</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.7</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.7'/>
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<updated>2016-05-11T20:37:54+00:00</updated>
<entry>
<title>kvm: introduce KVM_MAX_VCPU_ID</title>
<updated>2016-05-11T20:37:54+00:00</updated>
<author>
<name>Greg Kurz</name>
<email>gkurz@linux.vnet.ibm.com</email>
</author>
<published>2016-05-09T16:13:37+00:00</published>
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<id>urn:sha1:0b1b1dfd52a67f4f09a18cb82337199bc90ad7fb</id>
<content type='text'>
The KVM_MAX_VCPUS define provides the maximum number of vCPUs per guest, and
also the upper limit for vCPU ids. This is okay for all archs except PowerPC
which can have higher ids, depending on the cpu/core/thread topology. In the
worst case (single threaded guest, host with 8 threads per core), it limits
the maximum number of vCPUS to KVM_MAX_VCPUS / 8.

This patch separates the vCPU numbering from the total number of vCPUs, with
the introduction of KVM_MAX_VCPU_ID, as the maximal valid value for vCPU ids
plus one.

The corresponding KVM_CAP_MAX_VCPU_ID allows userspace to validate vCPU ids
before passing them to KVM_CREATE_VCPU.

This patch only implements KVM_MAX_VCPU_ID with a specific value for PowerPC.
Other archs continue to return KVM_MAX_VCPUS instead.

Suggested-by: Radim Krcmar &lt;rkrcmar@redhat.com&gt;
Signed-off-by: Greg Kurz &lt;gkurz@linux.vnet.ibm.com&gt;
Reviewed-by: Cornelia Huck &lt;cornelia.huck@de.ibm.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvm-arm-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD</title>
<updated>2016-03-09T10:50:42+00:00</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2016-03-09T10:50:42+00:00</published>
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<id>urn:sha1:ab92f30875a7ec3e84644a5494febd8901e66742</id>
<content type='text'>
KVM/ARM updates for 4.6

- VHE support so that we can run the kernel at EL2 on ARMv8.1 systems
- PMU support for guests
- 32bit world switch rewritten in C
- Various optimizations to the vgic save/restore code

Conflicts:
	include/uapi/linux/kvm.h
</content>
</entry>
<entry>
<title>Merge branch 'kvm-ppc-next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD</title>
<updated>2016-03-03T13:36:07+00:00</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2016-03-03T13:35:44+00:00</published>
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<id>urn:sha1:61ec84f145ef2baac7ea3d6d5604c8f29c0068b7</id>
<content type='text'>
The highlights are:

* Enable VFIO device on PowerPC, from David Gibson
* Optimizations to speed up IPIs between vcpus in HV KVM,
  from Suresh Warrier (who is also Suresh E. Warrier)
* In-kernel handling of IOMMU hypercalls, and support for dynamic DMA
  windows (DDW), from Alexey Kardashevskiy.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Add support for 64bit TCE windows</title>
<updated>2016-03-01T22:56:50+00:00</updated>
<author>
<name>Alexey Kardashevskiy</name>
<email>aik@ozlabs.ru</email>
</author>
<published>2016-03-01T06:54:40+00:00</published>
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<id>urn:sha1:58ded4201ff028b15f6b317228faa5f154a0663f</id>
<content type='text'>
The existing KVM_CREATE_SPAPR_TCE only supports 32bit windows which is not
enough for directly mapped windows as the guest can get more than 4GB.

This adds KVM_CREATE_SPAPR_TCE_64 ioctl and advertises it
via KVM_CAP_SPAPR_TCE_64 capability. The table size is checked against
the locked memory limit.

Since 64bit windows are to support Dynamic DMA windows (DDW), let's add
@bus_offset and @page_shift which are also required by DDW.

Signed-off-by: Alexey Kardashevskiy &lt;aik@ozlabs.ru&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Reserve KVM_CAP_SPAPR_TCE_64 capability number</title>
<updated>2016-03-01T22:56:50+00:00</updated>
<author>
<name>Alexey Kardashevskiy</name>
<email>aik@ozlabs.ru</email>
</author>
<published>2016-03-01T06:54:37+00:00</published>
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<id>urn:sha1:01d01d69192e417447dee97891d670804bedd2c8</id>
<content type='text'>
This adds a capability number for 64-bit TCE tables support.

Signed-off-by: Alexey Kardashevskiy &lt;aik@ozlabs.ru&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Introduce per-vcpu kvm device controls</title>
<updated>2016-02-29T18:34:21+00:00</updated>
<author>
<name>Shannon Zhao</name>
<email>shannon.zhao@linaro.org</email>
</author>
<published>2016-01-11T12:56:17+00:00</published>
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<id>urn:sha1:f577f6c2a6a5ccabe98061f256a1e2ff468d5e93</id>
<content type='text'>
In some cases it needs to get/set attributes specific to a vcpu and so
needs something else than ONE_REG.

Let's copy the KVM_DEVICE approach, and define the respective ioctls
for the vcpu file descriptor.

Signed-off-by: Shannon Zhao &lt;shannon.zhao@linaro.org&gt;
Reviewed-by: Andrew Jones &lt;drjones@redhat.com&gt;
Acked-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Add a new feature bit for PMUv3</title>
<updated>2016-02-29T18:34:21+00:00</updated>
<author>
<name>Shannon Zhao</name>
<email>shannon.zhao@linaro.org</email>
</author>
<published>2016-01-11T14:46:15+00:00</published>
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<id>urn:sha1:808e738142e7086ef793ebf9797099c392894e65</id>
<content type='text'>
To support guest PMUv3, use one bit of the VCPU INIT feature array.
Initialize the PMU when initialzing the vcpu with that bit and PMU
overflow interrupt set.

Signed-off-by: Shannon Zhao &lt;shannon.zhao@linaro.org&gt;
Acked-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Reviewed-by: Andrew Jones &lt;drjones@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>kvm/x86: Hyper-V VMBus hypercall userspace exit</title>
<updated>2016-02-16T17:48:44+00:00</updated>
<author>
<name>Andrey Smetanin</name>
<email>asmetanin@virtuozzo.com</email>
</author>
<published>2016-02-11T13:45:01+00:00</published>
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<id>urn:sha1:83326e43f27e9a8a501427a0060f8af519a39bb2</id>
<content type='text'>
The patch implements KVM_EXIT_HYPERV userspace exit
functionality for Hyper-V VMBus hypercalls:
HV_X64_HCALL_POST_MESSAGE, HV_X64_HCALL_SIGNAL_EVENT.

Changes v3:
* use vcpu-&gt;arch.complete_userspace_io to setup hypercall
result

Changes v2:
* use KVM_EXIT_HYPERV for hypercalls

Signed-off-by: Andrey Smetanin &lt;asmetanin@virtuozzo.com&gt;
Reviewed-by: Roman Kagan &lt;rkagan@virtuozzo.com&gt;
CC: Gleb Natapov &lt;gleb@kernel.org&gt;
CC: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
CC: Joerg Roedel &lt;joro@8bytes.org&gt;
CC: "K. Y. Srinivasan" &lt;kys@microsoft.com&gt;
CC: Haiyang Zhang &lt;haiyangz@microsoft.com&gt;
CC: Roman Kagan &lt;rkagan@virtuozzo.com&gt;
CC: Denis V. Lunev &lt;den@openvz.org&gt;
CC: qemu-devel@nongnu.org
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: s390: irq delivery should not rely on icptcode</title>
<updated>2016-02-10T12:12:53+00:00</updated>
<author>
<name>David Hildenbrand</name>
<email>dahi@linux.vnet.ibm.com</email>
</author>
<published>2015-11-04T15:46:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=eaa4f41642f096f1e10c15a2b172d79199e893ff'/>
<id>urn:sha1:eaa4f41642f096f1e10c15a2b172d79199e893ff</id>
<content type='text'>
Program irq injection during program irq intercepts is the last candidates
that injects nullifying irqs and relies on delivery to do the right thing.

As we should not rely on the icptcode during any delivery (because that
value will not be migrated), let's add a flag, telling prog IRQ delivery
to not rewind the PSW in case of nullifying prog IRQs.

Signed-off-by: David Hildenbrand &lt;dahi@linux.vnet.ibm.com&gt;
Signed-off-by: Christian Borntraeger &lt;borntraeger@de.ibm.com&gt;
</content>
</entry>
<entry>
<title>KVM: s390: migration / injection of prog irq ilc</title>
<updated>2016-02-10T12:12:50+00:00</updated>
<author>
<name>David Hildenbrand</name>
<email>dahi@linux.vnet.ibm.com</email>
</author>
<published>2015-11-04T15:33:33+00:00</published>
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<id>urn:sha1:634790b82759c98ee57c80966d859083fa2fcd8c</id>
<content type='text'>
We have to migrate the program irq ilc and someday we will have to
specify the ilc without KVM trying to autodetect the value.

Let's reuse one of the spare fields in our program irq that should
always be set to 0 by user space. Because we also want to make use
of 0 ilcs ("not available"), we need a validity indicator.

If no valid ilc is given, we try to autodetect the ilc via the current
icptcode and icptstatus + parameter and store the valid ilc in the
irq structure.

This has a nice effect: QEMU's making use of KVM_S390_IRQ /
KVM_S390_SET_IRQ_STATE / KVM_S390_GET_IRQ_STATE for migration will
directly migrate the ilc without any changes.

Please note that we use bit 0 as validity and bit 1,2 for the ilc, so
by applying the ilc mask we directly get the ilen which is usually what
we work with.

Reviewed-by: Christian Borntraeger &lt;borntraeger@de.ibm.com&gt;
Signed-off-by: David Hildenbrand &lt;dahi@linux.vnet.ibm.com&gt;
Signed-off-by: Christian Borntraeger &lt;borntraeger@de.ibm.com&gt;
</content>
</entry>
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