<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/include/uapi/drm/i915_drm.h, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-01-28T10:25:49+00:00</updated>
<entry>
<title>drm/i915: Fix VCS ring selection after uapi decoupling</title>
<updated>2016-01-28T10:25:49+00:00</updated>
<author>
<name>Tvrtko Ursulin</name>
<email>tvrtko.ursulin@intel.com</email>
</author>
<published>2016-01-27T13:41:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d9da6aa035c6dfdb003ff9776532b9b356d83f15'/>
<id>urn:sha1:d9da6aa035c6dfdb003ff9776532b9b356d83f15</id>
<content type='text'>
This got broken in:

   commit de1add360522c876c25ef2bbbbab1c94bdb509ab
   Author: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
   Date:   Fri Jan 15 15:12:50 2016 +0000

       drm/i915: Decouple execbuf uAPI from internal implementation

BSD ring flags need to be shifted before they can be considered
indices into the ring array.

Reported by Zhipeng Gong.

v2: Simplify the code. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Zhipeng Gong &lt;zhipeng.gong@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1453902069-31353-1-git-send-email-tvrtko.ursulin@linux.intel.com
Testcase: igt/gem_exec_basic # bdw-gt3
</content>
</entry>
<entry>
<title>drm/i915: Seal busy-ioctl uABI and prevent leaking of internal ids</title>
<updated>2016-01-21T11:00:35+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-01-15T16:51:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=426960bed3217f72a1b7bb94f084d79cc616ec0f'/>
<id>urn:sha1:426960bed3217f72a1b7bb94f084d79cc616ec0f</id>
<content type='text'>
Tvrtko was looking through the execbuffer-ioctl and noticed that the
uABI was tightly coupled to our internal engine identifiers. Close
inspection also revealed that we leak those internal engine identifiers
through the busy-ioctl, and those internal identifiers already do not
match the user identifiers. Fortuitiously, there is only one user of the
set of busy rings from the busy-ioctl, and they only wish to choose
between the RENDER and the BLT engines.

Let's fix the userspace ABI while we still can.

v2: Update the uAPI documentation to explain the identifiers.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Testcase: igt/gem_busy
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1452876706-21620-1-git-send-email-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-intel into drm-next</title>
<updated>2015-12-23T04:22:09+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2015-12-23T04:22:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ade1ba7346070709856d7e38f8d1a77b7aa710aa'/>
<id>urn:sha1:ade1ba7346070709856d7e38f8d1a77b7aa710aa</id>
<content type='text'>
- fix atomic watermark recomputation logic (Maarten)
- modeset sequence fixes for LPT (Ville)
- more kbl enabling&amp;prep work (Rodrigo, Wayne)
- first bits for mst audio
- page dirty tracking fixes from Dave Gordon
- new get_eld hook from Takashi, also included in the sound tree
- fixup cursor handling when placed at address 0 (Ville)
- refactor VBT parsing code (Jani)
- rpm wakelock debug infrastructure ( Imre)
- fbdev is pinned again (Chris)
- tune the busywait logic to avoid wasting cpu cycles (Chris)

* tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-intel: (81 commits)
  drm/i915: Update DRIVER_DATE to 20151218
  drm/i915/skl: Default to noncoherent access up to F0
  drm/i915: Only spin whilst waiting on the current request
  drm/i915: Limit the busy wait on requests to 5us not 10ms!
  drm/i915: Break busywaiting for requests on pending signals
  drm/i915: don't enable autosuspend on platforms without RPM support
  drm/i915/backlight: prefer dev_priv over dev pointer
  drm/i915: Disable primary plane if we fail to reconstruct BIOS fb (v2)
  drm/i915: Pin the ifbdev for the info-&gt;system_base GGTT mmapping
  drm/i915: Set the map-and-fenceable flag for preallocated objects
  drm/i915: mdelay(10) considered harmful
  drm/i915: check that we are in an RPM atomic section in GGTT PTE updaters
  drm/i915: add support for checking RPM atomic sections
  drm/i915: check that we hold an RPM wakelock ref before we put it
  drm/i915: add support for checking if we hold an RPM reference
  drm/i915: use assert_rpm_wakelock_held instead of opencoding it
  drm/i915: add assert_rpm_wakelock_held helper
  drm/i915: remove HAS_RUNTIME_PM check from RPM get/put/assert helpers
  drm/i915: get a permanent RPM reference on platforms w/o RPM support
  drm/i915: refactor RPM disabling due to RC6 being disabled
  ...
</content>
</entry>
<entry>
<title>Merge branch 'drm-header-fixes' of https://github.com/GabrielL/linux into drm-next</title>
<updated>2015-12-11T03:46:05+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2015-12-11T03:46:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=663a233eef643b38f36c05535cb5c9a4972edcc1'/>
<id>urn:sha1:663a233eef643b38f36c05535cb5c9a4972edcc1</id>
<content type='text'>
Fix all the problems with the header files and userspace builds
off them. I really care so little about this, but hey who am
I to stop progress.

* 'drm-header-fixes' of https://github.com/GabrielL/linux: (30 commits)
  drm: fix inclusion of drm.h in via_drm.h
  drm: fix inclusion of drm.h in vmwgfx_drm.h
  drm: fix inclusion of drm.h in virtgpu_drm.h
  drm: fix inclusion of drm.h in tegra_drm.h
  drm: fix inclusion of drm.h in savage_drm.h
  drm: fix inclusion of drm.h in r128_drm.h
  drm: fix inclusion of drm.h in qxl_drm.h
  drm: fix inclusion of drm.h in omap_drm.h
  drm: fix inclusion of drm.h in msm_drm.h
  drm: fix inclusion of drm.h in mga_drm.h
  drm: fix inclusion of drm.h in exynos_sarea.h
  drm: fix inclusion of drm.h in i810_drm.h
  drm: fix inclusion of drm.h in exynos_sarea.h
  drm: fix inclusion of drm.h in drm_sarea.h
  drm: drm_mode.h fix includes
  drm: drm_fourcc.h fix includes
  drm: include drm.h in armada_drm.h
  include/uapi/drm/amdgpu_drm.h: use __u32 and __u64 from &lt;linux/types.h&gt;
  drm: Kbuild: add admgpu_drm.h to the installed headers
  drm: use __u{32,64} instead of uint{32,64}_t in virtgpu_drm.h
  ...
</content>
</entry>
<entry>
<title>drm: fix inclusion of drm.h in exynos_sarea.h</title>
<updated>2015-12-10T11:33:23+00:00</updated>
<author>
<name>Gabriel Laskar</name>
<email>gabriel@lse.epita.fr</email>
</author>
<published>2015-11-30T14:10:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1049102ff72b294bbeb1a254fe4de4a558387b46'/>
<id>urn:sha1:1049102ff72b294bbeb1a254fe4de4a558387b46</id>
<content type='text'>
Using `#include "drm.h"` instead of `#include &lt;drm/drm.h&gt;` allow drm
headers to be moved in another directory without changes, like for the
libdrm imports.

Signed-off-by: Gabriel Laskar &lt;gabriel@lse.epita.fr&gt;
Reviewed-by: Emil Velikov &lt;emil.l.velikov@gmail.com&gt;
CC: Emil Velikov &lt;emil.l.velikov@gmail.com&gt;
CC: Mikko Rapeli &lt;mikko.rapeli@iki.fi&gt;
</content>
</entry>
<entry>
<title>drm/i915: Add soft-pinning API for execbuffer</title>
<updated>2015-12-09T10:20:17+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2015-12-08T11:55:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=506a8e87d8d2746b9e9d2433503fe237c54e4750'/>
<id>urn:sha1:506a8e87d8d2746b9e9d2433503fe237c54e4750</id>
<content type='text'>
Userspace can pass in an offset that it presumes the object is located
at. The kernel will then do its utmost to fit the object into that
location. The assumption is that userspace is handling its own object
locations (for example along with full-ppgtt) and that the kernel will
rarely have to make space for the user's requests.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;

v2: Fixed incorrect eviction found by Michal Winiarski - fix suggested by Chris
Wilson.  Fixed incorrect error paths causing crash found by Michal Winiarski.
(Not published externally)

v3: Rebased because of trivial conflict in object_bind_to_vm.  Fixed eviction
to allow eviction of soft-pinned objects when another soft-pinned object used
by a subsequent execbuffer overlaps reported by Michal Winiarski.
(Not published externally)

v4: Moved soft-pinned objects to the front of ordered_vmas so that they are
pinned first after an address conflict happens to avoid repeated conflicts in
rare cases (Suggested by Chris Wilson).  Expanded comment on
drm_i915_gem_exec_object2.offset to cover this new API.

v5: Added I915_PARAM_HAS_EXEC_SOFTPIN parameter for detecting this capability
(Kristian). Added check for multiple pinnings on eviction (Akash). Made sure
buffers are not considered misplaced without the user specifying
EXEC_OBJECT_SUPPORTS_48B_ADDRESS.  User must assume responsibility for any
addressing workarounds.  Updated object2.offset field comment again to clarify
NO_RELOC case (Chris).  checkpatch cleanup.

v6: Trivial rebase on latest drm-intel-nightly

v7: Catch attempts to pin above the max virtual address size and return
EINVAL (Tvrtko). Decouple EXEC_OBJECT_SUPPORTS_48B_ADDRESS and
EXEC_OBJECT_PINNED flags, user must pass both flags in any attempt to pin
something at an offset above 4GB (Chris, Daniel Vetter).

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Akash Goel &lt;akash.goel@intel.com&gt;
Cc: Vinay Belgaumkar &lt;vinay.belgaumkar@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Cc: Zou Nanhai &lt;nanhai.zou@intel.com&gt;
Cc: Kristian Høgsberg &lt;hoegsberg@gmail.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@linux.intel.com&gt;
Reviewed-by: Michel Thierry &lt;michel.thierry@intel.com&gt;
Acked-by: PDT
Signed-off-by: Thomas Daniel &lt;thomas.daniel@intel.com&gt;
Signed-off-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1449575707-20933-1-git-send-email-thomas.daniel@intel.com
</content>
</entry>
<entry>
<title>drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctl</title>
<updated>2015-11-18T12:35:16+00:00</updated>
<author>
<name>Ville Syrjälä</name>
<email>ville.syrjala@linux.intel.com</email>
</author>
<published>2015-11-06T19:43:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8697600b4046f26e497b200aff020f10ae6968ae'/>
<id>urn:sha1:8697600b4046f26e497b200aff020f10ae6968ae</id>
<content type='text'>
Store the upper dword of the register offset in the whitelist as well.
This would allow it to read register where the two halves aren't sitting
right next to each other, and it'll make it easier to make register
access type safe.

While at it change the register offsets to u32 from u64. Our register
space isn't quite that big, yet :)

v2: Use ldw/udw as the suffixes, and add a note about
    64bit wide split regs (Chris)

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1446839021-18599-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
</content>
</entry>
<entry>
<title>drm/i915: Report context GTT size</title>
<updated>2015-10-19T10:16:46+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2015-10-14T13:17:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fa8848f27895bd19e16aed77868f464be24034e6'/>
<id>urn:sha1:fa8848f27895bd19e16aed77868f464be24034e6</id>
<content type='text'>
Since the beginning we have conflated the size of the global GTT with
that of the per-process context sizes. In recent times (gen8+), those
are no longer the same where the global GTT is limited to 2/4GiB but the
per-process GTT may be anything up to 256TiB. Userspace knows nothing of
this discrepancy and outside of one or two hacks, uses the getaperture
ioctl to determine the maximum size it can use. Let's leave that as
reporting the global GTT and use the context reporting method to
describe the per-process value (which naturally fallsback to reporting
the aliasing or global on older platforms, so userspace can always use
this method where available).

Testcase: igt/gem_userptr_blits/minor-normal-sync
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90065
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Wa32bitGeneralStateOffset &amp; Wa32bitInstructionBaseOffset</title>
<updated>2015-10-01T16:12:17+00:00</updated>
<author>
<name>Michel Thierry</name>
<email>michel.thierry@intel.com</email>
</author>
<published>2015-10-01T12:33:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=101b506a7fc7be3f0d0a337ade270eb5eb5a2857'/>
<id>urn:sha1:101b506a7fc7be3f0d0a337ade270eb5eb5a2857</id>
<content type='text'>
There are some allocations that must be only referenced by 32-bit
offsets. To limit the chances of having the first 4GB already full,
objects not requiring this workaround use DRM_MM_SEARCH_BELOW/
DRM_MM_CREATE_TOP flags

In specific, any resource used with flat/heapless (0x00000000-0xfffff000)
General State Heap (GSH) or Instruction State Heap (ISH) must be in a
32-bit range, because the General State Offset and Instruction State
Offset are limited to 32-bits.

Objects must have EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag to indicate if
they can be allocated above the 32-bit address range. To limit the
chances of having the first 4GB already full, objects will use
DRM_MM_SEARCH_BELOW + DRM_MM_CREATE_TOP flags when possible.

The libdrm user of the EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag is here:
http://lists.freedesktop.org/archives/intel-gfx/2015-September/075836.html

v2: Changed flag logic from neeeds_32b, to supports_48b.
v3: Moved 48-bit support flag back to exec_object. (Chris, Daniel)
v4: Split pin flags into PIN_ZONE_4G and PIN_HIGH; update PIN_OFFSET_MASK
to use last PIN_ defined instead of hard-coded value; use correct limit
check in eb_vma_misplaced. (Chris)
v5: Don't touch PIN_OFFSET_MASK and update workaround comment (Chris)
v6: Apply pin-high for ggtt too (Chris)
v7: Handle simultaneous pin-high and pin-mappable end correctly (Akash)
    Fix check for entries currently using +4GB addresses, use min_t and
    other polish in object_bind_to_vm (Chris)
v8: Commit message updated to point to libdrm patch.
v9: vmas are allocated in the correct ozone, so only check flag when the
    vma has not been allocated. (Chris)

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt; (v4)
Signed-off-by: Michel Thierry &lt;michel.thierry@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>uapi/drm/i915_drm.h: fix userspace compilation.</title>
<updated>2015-09-02T13:26:58+00:00</updated>
<author>
<name>Artem Savkov</name>
<email>asavkov@redhat.com</email>
</author>
<published>2015-09-02T11:41:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=16f7249ddf831f5ec0e1358222ce5db300446b84'/>
<id>urn:sha1:16f7249ddf831f5ec0e1358222ce5db300446b84</id>
<content type='text'>
commit 346add7834557b5b9628b9bf2387106d42e631d4
Author: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Date:   Tue Jul 14 18:07:30 2015 +0200

    drm/i915: Use expcitly fixed type in compat32 structs

changed the type of param field in drm_i915_getparam from int to
s32. This header is exported to userspace and needs to use userspace
type __s32 instead.

This fixes userspace compilation errors like the following:
include/drm/i915_drm.h:361:2: error: unknown type name 's32'
  s32 param;

Signed-off-by: Artem Savkov &lt;asavkov@redhat.com&gt;
Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
</feed>
