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<title>BMC/Intel-BMC/linux.git/include/soc, branch dev-5.1</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.1</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.1'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2019-07-02T05:03:44+00:00</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152</title>
<updated>2019-07-02T05:03:44+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-27T06:55:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d5eae63c6411e73f1760595c66f9b78d7d4d23a9'/>
<id>urn:sha1:d5eae63c6411e73f1760595c66f9b78d7d4d23a9</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
(cherry picked from commit 2874c5fd284268364ece81a7bd936f3c8168e567)
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>Merge tag 'iommu-updates-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu</title>
<updated>2019-03-10T19:29:52+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-03-10T19:29:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=bb97be23db2a296c5f8b8b4c40feb0435b068c5e'/>
<id>urn:sha1:bb97be23db2a296c5f8b8b4c40feb0435b068c5e</id>
<content type='text'>
Pull IOMMU updates from Joerg Roedel:

 - A big cleanup and optimization patch-set for the Tegra GART driver

 - Documentation updates and fixes for the IOMMU-API

 - Support for page request in Intel VT-d scalable mode

 - Intel VT-d dma_[un]map_resource() support

 - Updates to the ATS enabling code for PCI (acked by Bjorn) and Intel
   VT-d to align with the latest version of the ATS spec

 - Relaxed IRQ source checking in the Intel VT-d driver for some aliased
   devices, needed for future devices which send IRQ messages from more
   than on request-ID

 - IRQ remapping driver for Hyper-V

 - Patches to make generic IOVA and IO-Page-Table code usable outside of
   the IOMMU code

 - Various other small fixes and cleanups

* tag 'iommu-updates-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (60 commits)
  iommu/vt-d: Get domain ID before clear pasid entry
  iommu/vt-d: Fix NULL pointer reference in intel_svm_bind_mm()
  iommu/vt-d: Set context field after value initialized
  iommu/vt-d: Disable ATS support on untrusted devices
  iommu/mediatek: Fix semicolon code style issue
  MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope
  iommu/hyper-v: Add Hyper-V stub IOMMU driver
  x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available
  PCI/ATS: Add inline to pci_prg_resp_pasid_required()
  iommu/vt-d: Check identity map for hot-added devices
  iommu: Fix IOMMU debugfs fallout
  iommu: Document iommu_ops.is_attach_deferred()
  iommu: Document iommu_ops.iotlb_sync_map()
  iommu/vt-d: Enable ATS only if the device uses page aligned address.
  PCI/ATS: Add pci_ats_page_aligned() interface
  iommu/vt-d: Fix PRI/PASID dependency issue.
  PCI/ATS: Add pci_prg_resp_pasid_required() interface.
  iommu/vt-d: Allow interrupts from the entire bus for aliased devices
  iommu/vt-d: Add helper to set an IRTE to verify only the bus number
  iommu: Fix flush_tlb_all typo
  ...
</content>
</entry>
<entry>
<title>Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers</title>
<updated>2019-02-15T17:01:17+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-02-15T17:00:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=187b4ac7dfeb74cf6e6043f82aeab4ddc2a4c44a'/>
<id>urn:sha1:187b4ac7dfeb74cf6e6043f82aeab4ddc2a4c44a</id>
<content type='text'>
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:

- Stefan updates the BCM2835 SoC driver with downstream properties and
  uses that to implement a reboot notifier to tell the VC4 firmware when
  Linux on the ARM CPU is rebooting

- Eric adds a proper power domain driver for the BCM283x SoCs and
  updates a bunch of drivers to have a better and clearer Device Tree
  definition to support power domains/breaking up of functionality. This
  requires converting the existing watchdog driver into a MFD and then
  breaking up the functionality into separate drivers and finally
  updating the DTS files to leverage the power domains information.

- Wei provides a fix for making a symbol static

* tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux:
  ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
  ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
  soc: bcm: bcm2835-pm: Make local symbol static
  soc: bcm: Make PM driver default for BCM2835
  soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
  bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.
  dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4)
  firmware: raspberrypi: notify VC4 firmware of a reboot
  soc: bcm2835: sync firmware properties with downstream

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers</title>
<updated>2019-02-15T16:24:45+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-02-15T16:24:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a21c3f1795c151755e93f2fdf33caaa92304faea'/>
<id>urn:sha1:a21c3f1795c151755e93f2fdf33caaa92304faea</id>
<content type='text'>
soc/tegra: Changes for v5.1-rc1

This contains a couple of miscellaneous fixes for minor issues and a
largish rework of the PMC driver to make it work on systems where the
PMC has been locked down and can only be accessed from secure firmware.

* tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Support systems where PMC is marked secure
  soc/tegra: pmc: Explicitly initialize all fields
  soc/tegra: pmc: Make alignment consistent
  soc/tegra: pmc: Pass struct tegra_pmc * where possible
  soc/tegra: pmc: Make tegra_powergate_is_powered() a local function
  soc/tegra: pmc: Add missing kerneldoc
  soc/tegra: pmc: Sort includes alphabetically
  soc/tegra: pmc: Use TEGRA186_ prefix for GPIO names
  soc/tegra: fuse: Fix typo in tegra210_init_speedo_data
  soc/tegra: fuse: Fix illegal free of IO base address

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'tegra-for-5.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers</title>
<updated>2019-02-15T16:23:25+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-02-15T16:23:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f73e22d621d3c0c8f88cedd42bb79e53863d40a4'/>
<id>urn:sha1:f73e22d621d3c0c8f88cedd42bb79e53863d40a4</id>
<content type='text'>
firmware: tegra: Changes for v5.1-rc1

These changes add support for BPMP on Tegra210.

* tag 'tegra-for-5.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware/tegra: Enable Tegra186 BPMP support on Tegra194
  firmware: tegra: Conditionally support SoC generations
  firmware: tegra: bpmp-tegra186: Remove unused includes
  firmware: tegra: add bpmp driver for Tegra210
  firmware: tegra: Refactor BPMP driver
  firmware: tegra: Reword messaging terminology

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: add bpmp driver for Tegra210</title>
<updated>2019-01-25T14:58:47+00:00</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2019-01-24T17:03:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=139251fc220830cc49b71331d281a8ad03a08ab7'/>
<id>urn:sha1:139251fc220830cc49b71331d281a8ad03a08ab7</id>
<content type='text'>
This patch adds driver for Tegra210 BPMP firmware.

The BPMP is a specific processor in Tegra210 chip, which runs firmware
for assisting in entering deep low power states (suspend to ram), and
offloading DRAM memory clock scaling on some platforms.

Based on work by Sivaram Nair &lt;sivaramn@nvidia.com&gt;

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: Refactor BPMP driver</title>
<updated>2019-01-25T14:58:47+00:00</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2019-01-24T17:03:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=cdfa358b248efd36c6a9cb4d4d0a3ba7509f8387'/>
<id>urn:sha1:cdfa358b248efd36c6a9cb4d4d0a3ba7509f8387</id>
<content type='text'>
Split BPMP driver into common and chip specific parts to facilitate
adding support for previous and future Tegra chips that are using BPMP
as co-processor.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Make tegra_powergate_is_powered() a local function</title>
<updated>2019-01-25T13:17:49+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2019-01-25T10:22:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d32dde2c5a110f2d69add70d7a9f1c20d82d0ef1'/>
<id>urn:sha1:d32dde2c5a110f2d69add70d7a9f1c20d82d0ef1</id>
<content type='text'>
Now there are no more external users of tegra_powergate_is_powered(),
make this a local function.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Integrate with Memory Controller driver</title>
<updated>2019-01-16T12:54:12+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:38:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ce2785a75dbca27375f3723f4e697a2a8dc096ee'/>
<id>urn:sha1:ce2785a75dbca27375f3723f4e697a2a8dc096ee</id>
<content type='text'>
The device-tree binding has been changed. There is no separate GART device
anymore, it is squashed into the Memory Controller. Integrate GART module
with the MC in a way it is done for the SMMU on Tegra30+.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Adapt to Tegra20 device-tree binding changes</title>
<updated>2019-01-16T12:54:11+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:38:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=96efa118c03648fdc76acad9ca8fe018a6be7145'/>
<id>urn:sha1:96efa118c03648fdc76acad9ca8fe018a6be7145</id>
<content type='text'>
The tegra20-mc device-tree binding has been changed, GART has been
squashed into Memory Controller and now the clock property is mandatory
for Tegra20, the DT compatible has been changed as well. Adapt driver to
the DT changes.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
</feed>
