<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/include/linux, branch dev-5.14-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.14-intel</id>
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<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2021-10-19T22:10:37+00:00</updated>
<entry>
<title>mfd: peci: Add ICX-D generation info</title>
<updated>2021-10-19T22:10:37+00:00</updated>
<author>
<name>Saravanan Palanisamy</name>
<email>saravanan.palanisamy@intel.com</email>
</author>
<published>2020-05-15T17:40:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f0d3d1f57ec93c1acd390137b7a2cd704f54a770'/>
<id>urn:sha1:f0d3d1f57ec93c1acd390137b7a2cd704f54a770</id>
<content type='text'>
This commit adds CPU generation info for ICX-D Xeon family.

Signed-off-by: Saravanan Palanisamy &lt;saravanan.palanisamy@intel.com&gt;
Signed-off-by: Anoop S &lt;anoopx.s@intel.com&gt;
</content>
</entry>
<entry>
<title>mfd: peci: Add ICX generation info</title>
<updated>2021-10-19T22:10:37+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2018-11-07T00:25:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=353ca49aeb4359fe0e35f90b07b1cc8dad438e97'/>
<id>urn:sha1:353ca49aeb4359fe0e35f90b07b1cc8dad438e97</id>
<content type='text'>
This commit adds CPU generation info for ICX family.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: Export function used to read BDF</title>
<updated>2021-10-19T22:10:37+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2021-01-28T21:31:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8414dc5fd37b29d3d4a2ec5cfe2a06bfccc53fbd'/>
<id>urn:sha1:8414dc5fd37b29d3d4a2ec5cfe2a06bfccc53fbd</id>
<content type='text'>
Recently, aspeed-mctp driver functionality was extended to store BDF
values for already discovered MCTP endpoints on PCIe bus.
Let's expose kernel API to read BDF based on endpoint ID.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>Update I3C drivers</title>
<updated>2021-10-19T22:10:35+00:00</updated>
<author>
<name>Dylan Hung</name>
<email>dylan_hung@aspeedtech.com</email>
</author>
<published>2020-12-14T01:29:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=069fbe14a7bb0e45664cd4efed7a990218bbfdc3'/>
<id>urn:sha1:069fbe14a7bb0e45664cd4efed7a990218bbfdc3</id>
<content type='text'>
This commit ports I3C updates from Aspeed SDK v00.06.00.

Note: Should be refined to get upstreamed.

Signed-off-by: Dylan Hung &lt;dylan_hung@aspeedtech.com&gt;
</content>
</entry>
<entry>
<title>peci: Add peci_revision property</title>
<updated>2021-10-19T22:10:35+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2020-12-06T13:16:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=98972afbfa8c6cbfd686cd23f8f2e70d646b864a'/>
<id>urn:sha1:98972afbfa8c6cbfd686cd23f8f2e70d646b864a</id>
<content type='text'>
Right now, PECI revision is determined using a result of GetDIB() PECI
command. Because GetDIB() may not be supported by all type of physical
media that provides PECI, we need an alternative.
Until we figure how to determine PECI revision there (if we can't do
that, we'll fallback to device tree), let's allow to hardcode PECI
revision as a property of hardware adapter.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: Expose internal kernel API</title>
<updated>2021-10-19T22:10:35+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2020-12-04T00:16:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a5ae0bdc017a5e2ad5d99e92b75c8b7dc7acbe0a'/>
<id>urn:sha1:a5ae0bdc017a5e2ad5d99e92b75c8b7dc7acbe0a</id>
<content type='text'>
Some protocols that are already implemented in kernel can be
encapsulated in MCTP packets. To allow use aspeed-mctp internally in
kernel space, let's allow to use selected functions outside of
aspeed-mctp.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>hwmon: peci: PCS utils</title>
<updated>2021-10-19T22:10:34+00:00</updated>
<author>
<name>Zbigniew Lukwinski</name>
<email>zbigniew.lukwinski@linux.intel.com</email>
</author>
<published>2020-06-16T09:34:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d8cb9eb815e9dd4fb7f70820874db9b7db014b2e'/>
<id>urn:sha1:d8cb9eb815e9dd4fb7f70820874db9b7db014b2e</id>
<content type='text'>
1. Helpers for reading/writing PCS registers added.
2. PECI sensor configuration structure definition and helpers added.
3. New PECI PCS index and parameters definitions added.

Tested:
 * on WilsonCity platform
 * hwmon/peci modules work as before the change

Signed-off-by: Zbigniew Lukwinski &lt;zbigniew.lukwinski@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>i2c: aspeed: add general call support</title>
<updated>2021-10-19T22:10:32+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2019-05-01T20:27:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=eaf9f979819ab60033a2cf3e79fb19e8f53e0282'/>
<id>urn:sha1:eaf9f979819ab60033a2cf3e79fb19e8f53e0282</id>
<content type='text'>
This commit adds general call support into Aspeed I2C driver.
This is downstream only customization so it should not go into
upstream.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>drivers: jtag: Add JTAG core driver</title>
<updated>2021-10-19T22:10:31+00:00</updated>
<author>
<name>Ernesto Corona</name>
<email>ernesto.corona@intel.com</email>
</author>
<published>2020-09-29T15:39:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3da94d4faacca5e06c6d846d49ffe94c966aa938'/>
<id>urn:sha1:3da94d4faacca5e06c6d846d49ffe94c966aa938</id>
<content type='text'>
JTAG class driver provide infrastructure to support hardware/software
JTAG platform drivers. It provide user layer API interface for flashing
and debugging external devices which equipped with JTAG interface
using standard transactions.

Driver exposes set of IOCTL to user space for:
- XFER:
  SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
  SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- GIOCSTATUS read the current TAPC state of the JTAG controller
- SIOCSTATE Forces the JTAG TAPC to go into a particular state.
- SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
- IOCBITBANG for low level control of JTAG signals.

Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;

Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX

Signed-off-by: Oleksandr Shamray &lt;oleksandrs@mellanox.com&gt;
Signed-off-by: Jiri Pirko &lt;jiri@mellanox.com&gt;
Signed-off-by: Ernesto Corona &lt;ernesto.corona@intel.com&gt;
Acked-by: Philippe Ombredanne &lt;pombredanne@nexb.com&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Boris Brezillon &lt;bbrezillon@kernel.org&gt;
Cc: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: Johan Hovold &lt;johan@kernel.org&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Joel Stanley &lt;joel@jms.id.au&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: Kees Cook &lt;keescook@chromium.org&gt;
Cc: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Cc: Federico Vaga &lt;federico.vaga@cern.ch&gt;
Cc: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Christian Gromm &lt;christian.gromm@microchip.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Yiwei Zhang &lt;zzyiwei@google.com&gt;
Cc: Alessandro Rubini &lt;rubini@gnudd.com&gt;
Cc: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Cc: Steven Filary &lt;steven.a.filary@intel.com&gt;
Cc: Vadim Pasternak &lt;vadimp@mellanox.com&gt;
Cc: Amithash Prasad &lt;amithash@fb.com&gt;
Cc: Patrick Williams &lt;patrickw3@fb.com&gt;
Cc: Rgrs &lt;rgrs@protonmail.com&gt;
</content>
</entry>
<entry>
<title>i2c: Add mux hold/unhold msg types</title>
<updated>2021-10-19T22:10:30+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2019-02-16T00:05:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=459f04dfb53ba159b1999ab76b02466b56a81f96'/>
<id>urn:sha1:459f04dfb53ba159b1999ab76b02466b56a81f96</id>
<content type='text'>
This commit adds mux hold/unhold message types to support extended
mux control for IPMB and MCTP devices. A hold or an unhold message
can be added at the end of I2C message stream wrapped by
repeated-start, also can be used as a single message independantly.

This mux hold/unhold message will be delivered throughout all mux
levels in the path. Means that if it goes to multi-level mux path,
all muxes will be held/unheld by this message.

1. Hold message
   struct i2c_msg msg;
   uint16_t timeout = 5000; // timeout in ms. 5 secs in this example.

   msg.addr = 0x0; // any value can be used. addr will be ignored in this packet.
   msg.flags = I2C_M_HOLD; // set this flag to indicate it's a hold message.
   msg.len = sizeof(uint16_t); // timeout value will be delivered using two bytes buffer.
   msg.buf = (uint8_t *)&amp;timeout; // set timeout value.

2. Unhold message
   struct i2c_msg msg;
   uint16_t timeout = 0; // set 0 for an unhold message.

   msg.addr = 0x0; // any value can be used. addr will be ignored in this packet.
   msg.flags = I2C_M_HOLD; // set this flag to indicate it's an unhold message.
   msg.len = sizeof(uint16_t); // timeout value will be delivered using two bytes buffer.
   msg.buf = (uint8_t *)&amp;timeout; // set timeout value.

   This unhold message can be delivered to a mux adapter even when
   a bus is locked so that any holding state can be unheld
   immediately by invoking this unhold message.

This patch would not be welcomed from upstream so it should be kept
in downstream only.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
</feed>
